Yield predictive model characterization in analog circuit design

Sawal Hamid Md Ali, Peter R. Wilson, Andrew D. Brown

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A new technique is presented that produces a characterized yield-predictive model by incorporating yield into the goal function directly. We explore the trade off between performance functions and yield estimation during the design optimization process. Through the integration of yield into the optimization process, the trade off between the performance functions can be better treated that able to produce a higher yield. This concept together with full circuit simulation and global search algorithm provides a robust solution across process corners and parameter variations. Encouraging results have been obtained and an example is presented to demonstrate the technique.

Original languageEnglish
Title of host publication2007 International Symposium on Integrated Circuits, ISIC
Pages289-292
Number of pages4
DOIs
Publication statusPublished - 2007
Externally publishedYes
Event2007 International Symposium on Integrated Circuits, ISIC - Singapore
Duration: 26 Sep 200728 Sep 2007

Other

Other2007 International Symposium on Integrated Circuits, ISIC
CitySingapore
Period26/9/0728/9/07

Fingerprint

Analog circuits
Circuit simulation

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Md Ali, S. H., Wilson, P. R., & Brown, A. D. (2007). Yield predictive model characterization in analog circuit design. In 2007 International Symposium on Integrated Circuits, ISIC (pp. 289-292). [4441855] https://doi.org/10.1109/ISICIR.2007.4441855

Yield predictive model characterization in analog circuit design. / Md Ali, Sawal Hamid; Wilson, Peter R.; Brown, Andrew D.

2007 International Symposium on Integrated Circuits, ISIC. 2007. p. 289-292 4441855.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Md Ali, SH, Wilson, PR & Brown, AD 2007, Yield predictive model characterization in analog circuit design. in 2007 International Symposium on Integrated Circuits, ISIC., 4441855, pp. 289-292, 2007 International Symposium on Integrated Circuits, ISIC, Singapore, 26/9/07. https://doi.org/10.1109/ISICIR.2007.4441855
Md Ali SH, Wilson PR, Brown AD. Yield predictive model characterization in analog circuit design. In 2007 International Symposium on Integrated Circuits, ISIC. 2007. p. 289-292. 4441855 https://doi.org/10.1109/ISICIR.2007.4441855
Md Ali, Sawal Hamid ; Wilson, Peter R. ; Brown, Andrew D. / Yield predictive model characterization in analog circuit design. 2007 International Symposium on Integrated Circuits, ISIC. 2007. pp. 289-292
@inproceedings{b8ccca61893845ce815b00a3c6cb4562,
title = "Yield predictive model characterization in analog circuit design",
abstract = "A new technique is presented that produces a characterized yield-predictive model by incorporating yield into the goal function directly. We explore the trade off between performance functions and yield estimation during the design optimization process. Through the integration of yield into the optimization process, the trade off between the performance functions can be better treated that able to produce a higher yield. This concept together with full circuit simulation and global search algorithm provides a robust solution across process corners and parameter variations. Encouraging results have been obtained and an example is presented to demonstrate the technique.",
author = "{Md Ali}, {Sawal Hamid} and Wilson, {Peter R.} and Brown, {Andrew D.}",
year = "2007",
doi = "10.1109/ISICIR.2007.4441855",
language = "English",
isbn = "1424407974",
pages = "289--292",
booktitle = "2007 International Symposium on Integrated Circuits, ISIC",

}

TY - GEN

T1 - Yield predictive model characterization in analog circuit design

AU - Md Ali, Sawal Hamid

AU - Wilson, Peter R.

AU - Brown, Andrew D.

PY - 2007

Y1 - 2007

N2 - A new technique is presented that produces a characterized yield-predictive model by incorporating yield into the goal function directly. We explore the trade off between performance functions and yield estimation during the design optimization process. Through the integration of yield into the optimization process, the trade off between the performance functions can be better treated that able to produce a higher yield. This concept together with full circuit simulation and global search algorithm provides a robust solution across process corners and parameter variations. Encouraging results have been obtained and an example is presented to demonstrate the technique.

AB - A new technique is presented that produces a characterized yield-predictive model by incorporating yield into the goal function directly. We explore the trade off between performance functions and yield estimation during the design optimization process. Through the integration of yield into the optimization process, the trade off between the performance functions can be better treated that able to produce a higher yield. This concept together with full circuit simulation and global search algorithm provides a robust solution across process corners and parameter variations. Encouraging results have been obtained and an example is presented to demonstrate the technique.

UR - http://www.scopus.com/inward/record.url?scp=51549100222&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=51549100222&partnerID=8YFLogxK

U2 - 10.1109/ISICIR.2007.4441855

DO - 10.1109/ISICIR.2007.4441855

M3 - Conference contribution

AN - SCOPUS:51549100222

SN - 1424407974

SN - 9781424407972

SP - 289

EP - 292

BT - 2007 International Symposium on Integrated Circuits, ISIC

ER -