VLSI implementation of high speed and high resolution FFT algorithm based on Radix 2 for DSP application

N. Mahdavi, R. Teymourzadeh, Masuri Bin Othman

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

Using Fast Fourier Transform (FFT) is indispensable in most signal processing applications. Designing an appropriate algorithm for the implementation of FFT can be efficacious in digital signal processing. Sophisticated techniques such as pipelining and parallel calculations have potential impacts on VLSI implementation of FFT algorithm. Furthermore, a mathematic approach such as floating point calculation achieves higher precision. In this paper, an efficient algorithm with using parallel and pipelining methods is proposed to implement high speed and high resolution FFT algorithm. Latency reduction is an important issue to implement the high speed FFT on FPGA. The Proposed FFT algorithm shows the latency of 5131 clock pulse when N refers to 1024 points. The design has the mean squared error (MSE) of 0.0001 which is preferable to Radix 2 FFT.

Original languageEnglish
Title of host publication2007 5th Student Conference on Research and Development, SCORED
DOIs
Publication statusPublished - 2007
Externally publishedYes
Event2007 5th Student Conference on Research and Development, SCORED - Selangor
Duration: 11 Dec 200712 Dec 2007

Other

Other2007 5th Student Conference on Research and Development, SCORED
CitySelangor
Period11/12/0712/12/07

Fingerprint

floating
Fast Fourier transform
mathematics
Latency
Mean squared error
Floating
Mathematics

Keywords

  • Butterfly
  • FFT
  • Floating point
  • Radix
  • VLSI

ASJC Scopus subject areas

  • Education
  • Management Science and Operations Research

Cite this

Mahdavi, N., Teymourzadeh, R., & Othman, M. B. (2007). VLSI implementation of high speed and high resolution FFT algorithm based on Radix 2 for DSP application. In 2007 5th Student Conference on Research and Development, SCORED [4451381] https://doi.org/10.1109/SCORED.2007.4451381

VLSI implementation of high speed and high resolution FFT algorithm based on Radix 2 for DSP application. / Mahdavi, N.; Teymourzadeh, R.; Othman, Masuri Bin.

2007 5th Student Conference on Research and Development, SCORED. 2007. 4451381.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Mahdavi, N, Teymourzadeh, R & Othman, MB 2007, VLSI implementation of high speed and high resolution FFT algorithm based on Radix 2 for DSP application. in 2007 5th Student Conference on Research and Development, SCORED., 4451381, 2007 5th Student Conference on Research and Development, SCORED, Selangor, 11/12/07. https://doi.org/10.1109/SCORED.2007.4451381
Mahdavi N, Teymourzadeh R, Othman MB. VLSI implementation of high speed and high resolution FFT algorithm based on Radix 2 for DSP application. In 2007 5th Student Conference on Research and Development, SCORED. 2007. 4451381 https://doi.org/10.1109/SCORED.2007.4451381
Mahdavi, N. ; Teymourzadeh, R. ; Othman, Masuri Bin. / VLSI implementation of high speed and high resolution FFT algorithm based on Radix 2 for DSP application. 2007 5th Student Conference on Research and Development, SCORED. 2007.
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