Two phase clocked adiabatic static CMOS logic and its logic family

Nazrul Anuar Nayan, Yasuhiro Takahashi, Toshikazu Sekine

Research output: Contribution to journalArticle

36 Citations (Scopus)

Abstract

This paper proposes a two-phase clocked adiabatic static CMOS logic (2PASCL) circuit that utilizes the principles of adiabatic switching and energy recovery. The low-power 2PASCL circuit uses two complementary split-level sinusoidal power supply clocks whose height is equal to Vdd. It can be directly derived from static CMOS circuits. By removing the diode from the charging path, higher output amplitude is achieved and the power consumption of the diode is eliminated. 2PASCL has switching activity that is lower than dynamic logic. We also design and simulate NOT, NAND, NOR, and XOR logic gates on the basis of the 2PASCL topology. From the simulation results, we find that 2PASCL 4-inverter chain logic can save up to 79% of dissipated energy as compared to that with a static CMOS logic at transition frequencies of 1 to 100 MHz. The results indicate that 2PASCL technology can be advantageously applied to low power digital devices operated at low frequencies, such as radio-frequency identifications (RFIDs), smart cards, and sensors.

Original languageEnglish
Pages (from-to)1-10
Number of pages10
JournalJournal of Semiconductor Technology and Science
Volume10
Issue number1
Publication statusPublished - Mar 2010
Externally publishedYes

Fingerprint

Diodes
Digital devices
Smart sensors
Smart cards
Logic gates
Networks (circuits)
Logic circuits
Radio frequency identification (RFID)
Clocks
Electric power utilization
Topology
Recovery

Keywords

  • Adiabatic logic
  • Energy recovery
  • Low-power
  • Power clock generator
  • Split-level
  • Two phase clocked

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Two phase clocked adiabatic static CMOS logic and its logic family. / Nayan, Nazrul Anuar; Takahashi, Yasuhiro; Sekine, Toshikazu.

In: Journal of Semiconductor Technology and Science, Vol. 10, No. 1, 03.2010, p. 1-10.

Research output: Contribution to journalArticle

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