The simultaneous logic and IDDQ testing of CMOS ICs with mixed-mode testing facility for sequential circuits

Md. Mamun Ibne Reaz, Faisal Mohd Yasin, Mohd Shahiman Sulaiman, Mohd Alauddin Ali

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents an approach to design and develop a VLSI system for the simultaneous logic and IDDQ testing of CMOS ICs with mixed-mode testing facility for sequential circuits. The work involves the design of an interfacing unit on PCB containing interfacing circuits for parallel data exchange between a test processor and a microcomputer. This allows IDDQ measurement for every vector used for logic testing, performing logic testing simultaneously, providing a promising IDDQ fault coverage and reducing substantially the time and cost of testing. Three basic test development strategies are considered. They are functional test development, structural test development and physical defect test development. Mixed-mode testing facility is adopted to enhance the performance and reduce the testing time.

Original languageEnglish
Title of host publication2003 International Semiconductor Device Research Symposium, ISDRS 2003 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages234-235
Number of pages2
ISBN (Print)0780381394, 9780780381391
DOIs
Publication statusPublished - 2003
Externally publishedYes
EventInternational Semiconductor Device Research Symposium, ISDRS 2003 - Washington, United States
Duration: 10 Dec 200312 Dec 2003

Other

OtherInternational Semiconductor Device Research Symposium, ISDRS 2003
CountryUnited States
CityWashington
Period10/12/0312/12/03

Fingerprint

Sequential circuits
Testing
Electronic data interchange
Polychlorinated biphenyls
Microcomputers
Defects
Networks (circuits)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Ibne Reaz, M. M., Yasin, F. M., Sulaiman, M. S., & Ali, M. A. (2003). The simultaneous logic and IDDQ testing of CMOS ICs with mixed-mode testing facility for sequential circuits. In 2003 International Semiconductor Device Research Symposium, ISDRS 2003 - Proceedings (pp. 234-235). [1272076] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISDRS.2003.1272076

The simultaneous logic and IDDQ testing of CMOS ICs with mixed-mode testing facility for sequential circuits. / Ibne Reaz, Md. Mamun; Yasin, Faisal Mohd; Sulaiman, Mohd Shahiman; Ali, Mohd Alauddin.

2003 International Semiconductor Device Research Symposium, ISDRS 2003 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2003. p. 234-235 1272076.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Ibne Reaz, MM, Yasin, FM, Sulaiman, MS & Ali, MA 2003, The simultaneous logic and IDDQ testing of CMOS ICs with mixed-mode testing facility for sequential circuits. in 2003 International Semiconductor Device Research Symposium, ISDRS 2003 - Proceedings., 1272076, Institute of Electrical and Electronics Engineers Inc., pp. 234-235, International Semiconductor Device Research Symposium, ISDRS 2003, Washington, United States, 10/12/03. https://doi.org/10.1109/ISDRS.2003.1272076
Ibne Reaz MM, Yasin FM, Sulaiman MS, Ali MA. The simultaneous logic and IDDQ testing of CMOS ICs with mixed-mode testing facility for sequential circuits. In 2003 International Semiconductor Device Research Symposium, ISDRS 2003 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2003. p. 234-235. 1272076 https://doi.org/10.1109/ISDRS.2003.1272076
Ibne Reaz, Md. Mamun ; Yasin, Faisal Mohd ; Sulaiman, Mohd Shahiman ; Ali, Mohd Alauddin. / The simultaneous logic and IDDQ testing of CMOS ICs with mixed-mode testing facility for sequential circuits. 2003 International Semiconductor Device Research Symposium, ISDRS 2003 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2003. pp. 234-235
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