The Pesona16™ RISC 16-bit microprocessor - Architecture, functional configurations, and performances

Airul Azha Abd Rahman, Zainol Abidin Abdul Rashid, Masuri Othman

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    The first Malaysian made 16-bit RISC processor the Pesona 16-™ designed and developed by MIMOS is described in terms of its architecture, programming model and its functional capabilities. Performance analysis and comparison with other similar 16-bit processors in the market are also made.

    Original languageEnglish
    Title of host publicationIEEE International Conference on Semiconductor Electronics, Proceedings, ICSE
    Pages139-146
    Number of pages8
    Publication statusPublished - 2000
    Event2000 4th IEEE International Conference on Semiconductor Electronics, ICSE 2000 - Port Dickson
    Duration: 13 Nov 200015 Nov 2000

    Other

    Other2000 4th IEEE International Conference on Semiconductor Electronics, ICSE 2000
    CityPort Dickson
    Period13/11/0015/11/00

    Fingerprint

    Reduced instruction set computing
    Microprocessor chips

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering
    • Electronic, Optical and Magnetic Materials

    Cite this

    Rahman, A. A. A., Rashid, Z. A. A., & Othman, M. (2000). The Pesona16™ RISC 16-bit microprocessor - Architecture, functional configurations, and performances. In IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE (pp. 139-146). [932452]

    The Pesona16™ RISC 16-bit microprocessor - Architecture, functional configurations, and performances. / Rahman, Airul Azha Abd; Rashid, Zainol Abidin Abdul; Othman, Masuri.

    IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE. 2000. p. 139-146 932452.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Rahman, AAA, Rashid, ZAA & Othman, M 2000, The Pesona16™ RISC 16-bit microprocessor - Architecture, functional configurations, and performances. in IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE., 932452, pp. 139-146, 2000 4th IEEE International Conference on Semiconductor Electronics, ICSE 2000, Port Dickson, 13/11/00.
    Rahman AAA, Rashid ZAA, Othman M. The Pesona16™ RISC 16-bit microprocessor - Architecture, functional configurations, and performances. In IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE. 2000. p. 139-146. 932452
    Rahman, Airul Azha Abd ; Rashid, Zainol Abidin Abdul ; Othman, Masuri. / The Pesona16™ RISC 16-bit microprocessor - Architecture, functional configurations, and performances. IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE. 2000. pp. 139-146
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