The FPGA approach in the design and development of an automated rail transit system controller

W. Chia, L. J. Jeganathan, Md. Mamun Ibne Reaz, F. Mohd-Yasin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we present the hardware realization of an automatic train controller modeled for KL Sentral train station. The prototype chip was developed and tested on Altera FLEX10K FPGA device and the algorithm has been specially designed to allow efficient hardware implementation. In the algorithm the automated control system employs a linear model to run the system taking into consideration inputs such as the trains actual states, desired states and error factors. The system in which connected to the individual train controller decides the optimized solution for all the active trains by feeding the information to the traffic lights throughout the station and providing the arrival time prediction to the train passengers in the station. Furthermore the algorithm takes into consideration other unpredictable factors such as faulty tracks and the delay caused by passengers. The input of the state machine are the sensors placed at various location on the tracks, while the output are the switches that control the tracks. The algorithm is rigorously simulated for all conditions. The timing analysis for the validation, functionality and performance of the model is performed using Aldec Active HDL and the logic synthesis was performed using Synplify. The models have been tested successfully, verified, and met the desired results.

Original languageEnglish
Title of host publicationProceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics
Pages321-325
Number of pages5
Publication statusPublished - 2004
Externally publishedYes
Event2004 IEEE International Conference on Semiconductor Electronics, ICSE 2004 - Kuala Lumpur
Duration: 4 Dec 20049 Dec 2004

Other

Other2004 IEEE International Conference on Semiconductor Electronics, ICSE 2004
CityKuala Lumpur
Period4/12/049/12/04

Fingerprint

Rails
Field programmable gate arrays (FPGA)
Controllers
Hardware
Telecommunication traffic
Switches
Control systems
Sensors

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Chia, W., Jeganathan, L. J., Ibne Reaz, M. M., & Mohd-Yasin, F. (2004). The FPGA approach in the design and development of an automated rail transit system controller. In Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics (pp. 321-325). [1620897]

The FPGA approach in the design and development of an automated rail transit system controller. / Chia, W.; Jeganathan, L. J.; Ibne Reaz, Md. Mamun; Mohd-Yasin, F.

Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics. 2004. p. 321-325 1620897.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Chia, W, Jeganathan, LJ, Ibne Reaz, MM & Mohd-Yasin, F 2004, The FPGA approach in the design and development of an automated rail transit system controller. in Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics., 1620897, pp. 321-325, 2004 IEEE International Conference on Semiconductor Electronics, ICSE 2004, Kuala Lumpur, 4/12/04.
Chia W, Jeganathan LJ, Ibne Reaz MM, Mohd-Yasin F. The FPGA approach in the design and development of an automated rail transit system controller. In Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics. 2004. p. 321-325. 1620897
Chia, W. ; Jeganathan, L. J. ; Ibne Reaz, Md. Mamun ; Mohd-Yasin, F. / The FPGA approach in the design and development of an automated rail transit system controller. Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics. 2004. pp. 321-325
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