### Abstract

This paper describes the development of novel algorithm of a partial encryption of compressed images intended for efficient hardware implementation. The compression algorithm decomposes images into several different parts while a secure encryption algorithm is then employed to encrypt only the crucial parts, which are considerably smaller than the original image. We use the breadth-first traversal linear lossless quadtree decomposition method for the partial compression and RSA is used for the encryption. VHDL modeling of the algorithm is implemented and simulated. Functional simulations are carried out to verify the functionality of the individual modules and the system on several different images. This algorithm has the potential of being extended to use other kind of compression algorithm such as lossy quadtree and SPIHT.

Original language | English |
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Title of host publication | Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics |

Pages | 316-320 |

Number of pages | 5 |

Publication status | Published - 2004 |

Externally published | Yes |

Event | 2004 IEEE International Conference on Semiconductor Electronics, ICSE 2004 - Kuala Lumpur Duration: 4 Dec 2004 → 9 Dec 2004 |

### Other

Other | 2004 IEEE International Conference on Semiconductor Electronics, ICSE 2004 |
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City | Kuala Lumpur |

Period | 4/12/04 → 9/12/04 |

### Fingerprint

### ASJC Scopus subject areas

- Electrical and Electronic Engineering

### Cite this

*Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics*(pp. 316-320). [1620896]

**The development of partial encryption of compressed images algorithm : VHDL approach.** / Mohd-Yasin, F.; Tan, S. L.; Tan, H. Y.; Ibne Reaz, Md. Mamun.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

*Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics.*, 1620896, pp. 316-320, 2004 IEEE International Conference on Semiconductor Electronics, ICSE 2004, Kuala Lumpur, 4/12/04.

}

TY - GEN

T1 - The development of partial encryption of compressed images algorithm

T2 - VHDL approach

AU - Mohd-Yasin, F.

AU - Tan, S. L.

AU - Tan, H. Y.

AU - Ibne Reaz, Md. Mamun

PY - 2004

Y1 - 2004

N2 - This paper describes the development of novel algorithm of a partial encryption of compressed images intended for efficient hardware implementation. The compression algorithm decomposes images into several different parts while a secure encryption algorithm is then employed to encrypt only the crucial parts, which are considerably smaller than the original image. We use the breadth-first traversal linear lossless quadtree decomposition method for the partial compression and RSA is used for the encryption. VHDL modeling of the algorithm is implemented and simulated. Functional simulations are carried out to verify the functionality of the individual modules and the system on several different images. This algorithm has the potential of being extended to use other kind of compression algorithm such as lossy quadtree and SPIHT.

AB - This paper describes the development of novel algorithm of a partial encryption of compressed images intended for efficient hardware implementation. The compression algorithm decomposes images into several different parts while a secure encryption algorithm is then employed to encrypt only the crucial parts, which are considerably smaller than the original image. We use the breadth-first traversal linear lossless quadtree decomposition method for the partial compression and RSA is used for the encryption. VHDL modeling of the algorithm is implemented and simulated. Functional simulations are carried out to verify the functionality of the individual modules and the system on several different images. This algorithm has the potential of being extended to use other kind of compression algorithm such as lossy quadtree and SPIHT.

UR - http://www.scopus.com/inward/record.url?scp=51349084146&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=51349084146&partnerID=8YFLogxK

M3 - Conference contribution

SN - 0780386582

SN - 9780780386587

SP - 316

EP - 320

BT - Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics

ER -