The development of partial encryption of compressed images algorithm

VHDL approach

F. Mohd-Yasin, S. L. Tan, H. Y. Tan, Md. Mamun Ibne Reaz

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper describes the development of novel algorithm of a partial encryption of compressed images intended for efficient hardware implementation. The compression algorithm decomposes images into several different parts while a secure encryption algorithm is then employed to encrypt only the crucial parts, which are considerably smaller than the original image. We use the breadth-first traversal linear lossless quadtree decomposition method for the partial compression and RSA is used for the encryption. VHDL modeling of the algorithm is implemented and simulated. Functional simulations are carried out to verify the functionality of the individual modules and the system on several different images. This algorithm has the potential of being extended to use other kind of compression algorithm such as lossy quadtree and SPIHT.

Original languageEnglish
Title of host publicationProceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics
Pages316-320
Number of pages5
Publication statusPublished - 2004
Externally publishedYes
Event2004 IEEE International Conference on Semiconductor Electronics, ICSE 2004 - Kuala Lumpur
Duration: 4 Dec 20049 Dec 2004

Other

Other2004 IEEE International Conference on Semiconductor Electronics, ICSE 2004
CityKuala Lumpur
Period4/12/049/12/04

Fingerprint

Computer hardware description languages
Cryptography
Computer hardware
Decomposition

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Mohd-Yasin, F., Tan, S. L., Tan, H. Y., & Ibne Reaz, M. M. (2004). The development of partial encryption of compressed images algorithm: VHDL approach. In Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics (pp. 316-320). [1620896]

The development of partial encryption of compressed images algorithm : VHDL approach. / Mohd-Yasin, F.; Tan, S. L.; Tan, H. Y.; Ibne Reaz, Md. Mamun.

Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics. 2004. p. 316-320 1620896.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Mohd-Yasin, F, Tan, SL, Tan, HY & Ibne Reaz, MM 2004, The development of partial encryption of compressed images algorithm: VHDL approach. in Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics., 1620896, pp. 316-320, 2004 IEEE International Conference on Semiconductor Electronics, ICSE 2004, Kuala Lumpur, 4/12/04.
Mohd-Yasin F, Tan SL, Tan HY, Ibne Reaz MM. The development of partial encryption of compressed images algorithm: VHDL approach. In Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics. 2004. p. 316-320. 1620896
Mohd-Yasin, F. ; Tan, S. L. ; Tan, H. Y. ; Ibne Reaz, Md. Mamun. / The development of partial encryption of compressed images algorithm : VHDL approach. Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics. 2004. pp. 316-320
@inproceedings{4efe07db9f3c47ec801b8b674eae18ba,
title = "The development of partial encryption of compressed images algorithm: VHDL approach",
abstract = "This paper describes the development of novel algorithm of a partial encryption of compressed images intended for efficient hardware implementation. The compression algorithm decomposes images into several different parts while a secure encryption algorithm is then employed to encrypt only the crucial parts, which are considerably smaller than the original image. We use the breadth-first traversal linear lossless quadtree decomposition method for the partial compression and RSA is used for the encryption. VHDL modeling of the algorithm is implemented and simulated. Functional simulations are carried out to verify the functionality of the individual modules and the system on several different images. This algorithm has the potential of being extended to use other kind of compression algorithm such as lossy quadtree and SPIHT.",
author = "F. Mohd-Yasin and Tan, {S. L.} and Tan, {H. Y.} and {Ibne Reaz}, {Md. Mamun}",
year = "2004",
language = "English",
isbn = "0780386582",
pages = "316--320",
booktitle = "Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics",

}

TY - GEN

T1 - The development of partial encryption of compressed images algorithm

T2 - VHDL approach

AU - Mohd-Yasin, F.

AU - Tan, S. L.

AU - Tan, H. Y.

AU - Ibne Reaz, Md. Mamun

PY - 2004

Y1 - 2004

N2 - This paper describes the development of novel algorithm of a partial encryption of compressed images intended for efficient hardware implementation. The compression algorithm decomposes images into several different parts while a secure encryption algorithm is then employed to encrypt only the crucial parts, which are considerably smaller than the original image. We use the breadth-first traversal linear lossless quadtree decomposition method for the partial compression and RSA is used for the encryption. VHDL modeling of the algorithm is implemented and simulated. Functional simulations are carried out to verify the functionality of the individual modules and the system on several different images. This algorithm has the potential of being extended to use other kind of compression algorithm such as lossy quadtree and SPIHT.

AB - This paper describes the development of novel algorithm of a partial encryption of compressed images intended for efficient hardware implementation. The compression algorithm decomposes images into several different parts while a secure encryption algorithm is then employed to encrypt only the crucial parts, which are considerably smaller than the original image. We use the breadth-first traversal linear lossless quadtree decomposition method for the partial compression and RSA is used for the encryption. VHDL modeling of the algorithm is implemented and simulated. Functional simulations are carried out to verify the functionality of the individual modules and the system on several different images. This algorithm has the potential of being extended to use other kind of compression algorithm such as lossy quadtree and SPIHT.

UR - http://www.scopus.com/inward/record.url?scp=51349084146&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=51349084146&partnerID=8YFLogxK

M3 - Conference contribution

SN - 0780386582

SN - 9780780386587

SP - 316

EP - 320

BT - Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics

ER -