Proposed system architecture for integrity verification of embedded systems

Abdo Ali A. Al-Wosabi, Zarina Shukur

Research output: Contribution to journalArticle

Abstract

Since, the digital devices play essential roles in our daily life, system integrity is important. Thus, there is a need to propose appropriate and effective techniques/tools to verify that the original/pure Embedded Systems (ESs) have been used in those devices. We present our proposed system architecture for ESs integrity verification which includes two main phases: fetching an ES code at a server site (i.e., data center) and examining the ES at a remote site (using a designed user application). The integrity of that ES could be verified by comparing the computed hash value, result could show whether that system has been altered or tampered with. We integrate hash function (SHA-2) with a random key to calculate a unique digest value for a targeted system. Also, we use timestamps and nonce values, two secure keys and public key algorithm to design a security protocol.

Original languageEnglish
Pages (from-to)2371-2376
Number of pages6
JournalJournal of Engineering and Applied Sciences
Volume12
Issue number9
DOIs
Publication statusPublished - 2017

Fingerprint

Embedded systems
Digital devices
Hash functions
Servers
Network protocols

Keywords

  • Computed hash value
  • Embedded systems
  • Integrity verification
  • Software tampering
  • System integrity

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Proposed system architecture for integrity verification of embedded systems. / Al-Wosabi, Abdo Ali A.; Shukur, Zarina.

In: Journal of Engineering and Applied Sciences, Vol. 12, No. 9, 2017, p. 2371-2376.

Research output: Contribution to journalArticle

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