Pipeline floating point ALU design using VHDL

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

A pipeline floating point arithmetic logic unit (ALU) design using VHDL is introduced. The novelty of the ALU is it gives high performance through the pipelining concept. Pipelining is a technique where multiple instruction executions are overlapped. In the top-down design approach, four arithmetic modules: addition, subtraction, multiplication, and division: are combined to form the floating-point ALU. Each module is divided into smaller modules. Two bits selection determines which operation takes place at a particular time. The pipeline modules are independent of each other. AH the modules in the ALU design are realized using VHDL. Design functionalities are validated through simulation and compilation. Test vectors are created to verify the outputs as opposed to the calculated results. Besides verifying the outputs, the outputs' timing diagram and interfacing signals are also tracked to ensure that they adhere to the design specifications. Successful implementation of pipelining in floating point ALU using VHDL fulfills the needs for different high-performance applications.

Original languageEnglish
Title of host publicationIEEE International Conference on Semiconductor Electronics, Proceedings, ICSE
Pages204-208
Number of pages5
Publication statusPublished - 2002
Externally publishedYes
Event2002 5th IEEE International Conference on Semiconductor Electronics, ICSE 2002 - Penang
Duration: 19 Dec 200221 Dec 2002

Other

Other2002 5th IEEE International Conference on Semiconductor Electronics, ICSE 2002
CityPenang
Period19/12/0221/12/02

Fingerprint

Digital arithmetic
Computer hardware description languages
Pipelines
Specifications

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Ibne Reaz, M. M., Islam, M. S., & Sulaiman, M. S. (2002). Pipeline floating point ALU design using VHDL. In IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE (pp. 204-208). [1217807]

Pipeline floating point ALU design using VHDL. / Ibne Reaz, Md. Mamun; Islam, Md. Shabiul; Sulaiman, Mohd S.

IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE. 2002. p. 204-208 1217807.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Ibne Reaz, MM, Islam, MS & Sulaiman, MS 2002, Pipeline floating point ALU design using VHDL. in IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE., 1217807, pp. 204-208, 2002 5th IEEE International Conference on Semiconductor Electronics, ICSE 2002, Penang, 19/12/02.
Ibne Reaz MM, Islam MS, Sulaiman MS. Pipeline floating point ALU design using VHDL. In IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE. 2002. p. 204-208. 1217807
Ibne Reaz, Md. Mamun ; Islam, Md. Shabiul ; Sulaiman, Mohd S. / Pipeline floating point ALU design using VHDL. IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE. 2002. pp. 204-208
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