Noise analysis for digit slicing FFT

Z. A M Sharrif, M. Othman, T. S. Theong

    Research output: Contribution to journalArticle

    2 Citations (Scopus)

    Abstract

    The digit slicing architecture of the fast Fourier transform is modular in nature and easily applicable to VLSI implementation. The error caused by the digit slicing implementation of on chip fast Fourier transform is analysed. A mathematical model is proposed to arrive at the signal to noise ratio of a general sliced structure by modelling the error as an additive white noise. The model is capable of satisfactorily predicting the signal to noise ratio.

    Original languageEnglish
    Pages (from-to)509-512
    Number of pages4
    JournalIEE Proceedings, Part F: Radar and Signal Processing
    Volume138
    Issue number5
    Publication statusPublished - Oct 1991

    Fingerprint

    Fast Fourier transforms
    Signal to noise ratio
    White noise
    Mathematical models

    ASJC Scopus subject areas

    • Engineering(all)

    Cite this

    Sharrif, Z. A. M., Othman, M., & Theong, T. S. (1991). Noise analysis for digit slicing FFT. IEE Proceedings, Part F: Radar and Signal Processing, 138(5), 509-512.

    Noise analysis for digit slicing FFT. / Sharrif, Z. A M; Othman, M.; Theong, T. S.

    In: IEE Proceedings, Part F: Radar and Signal Processing, Vol. 138, No. 5, 10.1991, p. 509-512.

    Research output: Contribution to journalArticle

    Sharrif, ZAM, Othman, M & Theong, TS 1991, 'Noise analysis for digit slicing FFT', IEE Proceedings, Part F: Radar and Signal Processing, vol. 138, no. 5, pp. 509-512.
    Sharrif ZAM, Othman M, Theong TS. Noise analysis for digit slicing FFT. IEE Proceedings, Part F: Radar and Signal Processing. 1991 Oct;138(5):509-512.
    Sharrif, Z. A M ; Othman, M. ; Theong, T. S. / Noise analysis for digit slicing FFT. In: IEE Proceedings, Part F: Radar and Signal Processing. 1991 ; Vol. 138, No. 5. pp. 509-512.
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