New interpolation technique for highly linear CMOS ADC

Shazia Seemi, Mohd Shahiman Sulaiman, Arshad Suhail Farooqui, Md. Mamun Ibne Reaz

Research output: Contribution to journalArticle

Abstract

A new interpolation technique for high speed ADCs is described. Simple summing differential amplifiers operating in continuous time are used as the interpolator. Incorporated in a 1.3Gsample/s 6-bit CMOS Flash with Interpolation Analog-to-Digital Converter and prototyped on CMOS 0.18-um process, measured results indicated a significant improvement in converter linearity compared to other interpolation techniques.

Original languageEnglish
Pages (from-to)148-150
Number of pages3
JournalInformacije MIDEM
Volume36
Issue number3
Publication statusPublished - Sep 2006
Externally publishedYes

Fingerprint

Interpolation
Differential amplifiers
Digital to analog conversion

Keywords

  • CMOS ADC
  • Data converter
  • Flash
  • High-speed ADC
  • Interpolation

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Materials Science(all)

Cite this

Seemi, S., Sulaiman, M. S., Farooqui, A. S., & Ibne Reaz, M. M. (2006). New interpolation technique for highly linear CMOS ADC. Informacije MIDEM, 36(3), 148-150.

New interpolation technique for highly linear CMOS ADC. / Seemi, Shazia; Sulaiman, Mohd Shahiman; Farooqui, Arshad Suhail; Ibne Reaz, Md. Mamun.

In: Informacije MIDEM, Vol. 36, No. 3, 09.2006, p. 148-150.

Research output: Contribution to journalArticle

Seemi, S, Sulaiman, MS, Farooqui, AS & Ibne Reaz, MM 2006, 'New interpolation technique for highly linear CMOS ADC', Informacije MIDEM, vol. 36, no. 3, pp. 148-150.
Seemi S, Sulaiman MS, Farooqui AS, Ibne Reaz MM. New interpolation technique for highly linear CMOS ADC. Informacije MIDEM. 2006 Sep;36(3):148-150.
Seemi, Shazia ; Sulaiman, Mohd Shahiman ; Farooqui, Arshad Suhail ; Ibne Reaz, Md. Mamun. / New interpolation technique for highly linear CMOS ADC. In: Informacije MIDEM. 2006 ; Vol. 36, No. 3. pp. 148-150.
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