Low voltage charge pump circuit using 0.18 μm cmos technology

Kang Cheng Wei, Md Syedul Amin, Md. Mamun Ibne Reaz, Labonnah Farzana Rahman, Jubayer Jalil

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

An enhanced charge pump circuit utilizing charge-transfer-switch (CTS) to direct charge flow with improved voltage pumping gain is proposed in this paper. The diodeconfigured output stage limitation is managed through the pumping of output stage by the clock of improved charge pump circuit. Using Mentor Graphics, the proposed charge pump circuit is designed in 0.18 urn CMOS process. It is able to pump an input voltage of 1.8 V to a measured output of 5.95 V through 20MHz clock signal with each pumping capacitor of 0.1 pF and smoothing capacitor of 0.1 pF at the output. From the simulation result, it is evident that the proposed charged pump circuit offers higher pumping gain compared with the existing charge pump circuit. Besides, using in NonVolatile Memory (NVM), proposed design can be used in low voltage memory circuits.

Original languageEnglish
Pages (from-to)83-92
Number of pages10
JournalRevue Roumaine des Sciences Techniques Serie Electrotechnique et Energetique
Volume58
Issue number1
Publication statusPublished - Jan 2013

Fingerprint

Charge pump circuits
Electric potential
Clocks
Capacitors
Pumps
Data storage equipment
Networks (circuits)
Charge transfer
Switches

Keywords

  • Charge pump
  • CMOS
  • EEPROM
  • NVM.

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Energy(all)

Cite this

Low voltage charge pump circuit using 0.18 μm cmos technology. / Wei, Kang Cheng; Amin, Md Syedul; Ibne Reaz, Md. Mamun; Rahman, Labonnah Farzana; Jalil, Jubayer.

In: Revue Roumaine des Sciences Techniques Serie Electrotechnique et Energetique, Vol. 58, No. 1, 01.2013, p. 83-92.

Research output: Contribution to journalArticle

Wei, Kang Cheng ; Amin, Md Syedul ; Ibne Reaz, Md. Mamun ; Rahman, Labonnah Farzana ; Jalil, Jubayer. / Low voltage charge pump circuit using 0.18 μm cmos technology. In: Revue Roumaine des Sciences Techniques Serie Electrotechnique et Energetique. 2013 ; Vol. 58, No. 1. pp. 83-92.
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