Low power D flip-flop serial in/parallel out based shift register

Mohammad Arif Sobhan Bhuiyan, Arvin Mahmoudbeik, Torikul Islam Badal, Md. Mamun Ibne Reaz, Labonnah F. Rahman

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

The paper demonstrates the circuit of a low power D flip-flop serial in/parallel out (DFF SIPO) based shift register design. The flip-flops (FF's) consumption of casual logic power in a SoC chip (system on chip) commonly overpasses 50% as long the input and the output are in the same state thanks to the redundancy transition of interior loops. Conventional implementation of shift register systems such as linear feedback shift registers (LFSR) have two main drawbacks namely that elements into structure have been clocked during every clock cycle, and throughput is confined to just one (1) bit per clock cycle. Large scale integrated systems have much higher power consumption when tested due to the increased level of circuit activity. The higher rate of circuit activity can help reduce transition times that are from the input to the output phases. Flip-flops have been performed in 0.18μm CMOS technology. Circuit simulations with displays showing appropriate power dissipations have been reduced are possible where input signals decrease switching activities. A 16-Bit shift register is shown as an easy low power usage.

Original languageEnglish
Title of host publication2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages180-184
Number of pages5
ISBN (Electronic)9781509028894
DOIs
Publication statusPublished - 27 Mar 2017
Event2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016 - Putrajaya, Malaysia
Duration: 14 Nov 201616 Nov 2016

Other

Other2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016
CountryMalaysia
CityPutrajaya
Period14/11/1616/11/16

Fingerprint

shift registers
flip-flops
Shift registers
Flip flop circuits
clocks
Networks (circuits)
Clocks
Overpasses
chips
systems-on-a-chip
cycles
output
Circuit simulation
redundancy
logic
Redundancy
Microprocessor chips
Energy dissipation
CMOS
Computer systems

Keywords

  • 16-Bit Counter
  • Circuit Activity
  • CMOS Technology
  • Flip-Fops Serial In/ Parallel Out
  • Low-Power Circuits

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Biomedical Engineering
  • Control and Systems Engineering
  • Hardware and Architecture
  • Computer Networks and Communications
  • Instrumentation

Cite this

Bhuiyan, M. A. S., Mahmoudbeik, A., Badal, T. I., Ibne Reaz, M. M., & Rahman, L. F. (2017). Low power D flip-flop serial in/parallel out based shift register. In 2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016 (pp. 180-184). [7888034] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICAEES.2016.7888034

Low power D flip-flop serial in/parallel out based shift register. / Bhuiyan, Mohammad Arif Sobhan; Mahmoudbeik, Arvin; Badal, Torikul Islam; Ibne Reaz, Md. Mamun; Rahman, Labonnah F.

2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016. Institute of Electrical and Electronics Engineers Inc., 2017. p. 180-184 7888034.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bhuiyan, MAS, Mahmoudbeik, A, Badal, TI, Ibne Reaz, MM & Rahman, LF 2017, Low power D flip-flop serial in/parallel out based shift register. in 2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016., 7888034, Institute of Electrical and Electronics Engineers Inc., pp. 180-184, 2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016, Putrajaya, Malaysia, 14/11/16. https://doi.org/10.1109/ICAEES.2016.7888034
Bhuiyan MAS, Mahmoudbeik A, Badal TI, Ibne Reaz MM, Rahman LF. Low power D flip-flop serial in/parallel out based shift register. In 2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016. Institute of Electrical and Electronics Engineers Inc. 2017. p. 180-184. 7888034 https://doi.org/10.1109/ICAEES.2016.7888034
Bhuiyan, Mohammad Arif Sobhan ; Mahmoudbeik, Arvin ; Badal, Torikul Islam ; Ibne Reaz, Md. Mamun ; Rahman, Labonnah F. / Low power D flip-flop serial in/parallel out based shift register. 2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 180-184
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