Implementation of low power compressed ROM for direct digital frequency synthesizer

Salah Hasan Alkurwy, Sawal Hamid Md Ali, Md. Shabiul Islam

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

A Low Power Compressed ROM Look-up table has been presented in this paper to achieve low power consumption of the direct digital frequency synthesizer as well small core size. The quarter wave symmetry technique is used to store only one quarter of the sine wave. The suggested 12-bit compressed ROM designed consists of three 4-bit sub-ROMs based on an angular decomposition technique and trigonometric identity. Exploiting the advantages of sine-cosine symmetrical attributes together with XOR logic gates, one sub-ROM block can be removed from the design. These techniques, compressed the ROM into 368 bits. The ROM compressed ratio is 534.2:1, with only two adders, two multipliers, and XOR-gates with high frequency resolution of 0.029 Hz.

Original languageEnglish
Title of host publicationIEEE International Conference on Semiconductor Electronics, Proceedings, ICSE
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages309-312
Number of pages4
ISBN (Print)9781479957606
DOIs
Publication statusPublished - 10 Oct 2014
Event11th IEEE International Conference on Semiconductor Electronics, ICSE 2014 - Kuala Lumpur
Duration: 27 Aug 201429 Aug 2014

Other

Other11th IEEE International Conference on Semiconductor Electronics, ICSE 2014
CityKuala Lumpur
Period27/8/1429/8/14

Fingerprint

Frequency synthesizers
ROM
Logic gates
Adders
Electric power utilization
Decomposition

Keywords

  • direct digital frequency synthesizer (DDFS)
  • phase accumulator (PA)
  • ROM Look-up table (ROM LUT)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Alkurwy, S. H., Md Ali, S. H., & Islam, M. S. (2014). Implementation of low power compressed ROM for direct digital frequency synthesizer. In IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE (pp. 309-312). [6920859] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SMELEC.2014.6920859

Implementation of low power compressed ROM for direct digital frequency synthesizer. / Alkurwy, Salah Hasan; Md Ali, Sawal Hamid; Islam, Md. Shabiul.

IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE. Institute of Electrical and Electronics Engineers Inc., 2014. p. 309-312 6920859.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Alkurwy, SH, Md Ali, SH & Islam, MS 2014, Implementation of low power compressed ROM for direct digital frequency synthesizer. in IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE., 6920859, Institute of Electrical and Electronics Engineers Inc., pp. 309-312, 11th IEEE International Conference on Semiconductor Electronics, ICSE 2014, Kuala Lumpur, 27/8/14. https://doi.org/10.1109/SMELEC.2014.6920859
Alkurwy SH, Md Ali SH, Islam MS. Implementation of low power compressed ROM for direct digital frequency synthesizer. In IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE. Institute of Electrical and Electronics Engineers Inc. 2014. p. 309-312. 6920859 https://doi.org/10.1109/SMELEC.2014.6920859
Alkurwy, Salah Hasan ; Md Ali, Sawal Hamid ; Islam, Md. Shabiul. / Implementation of low power compressed ROM for direct digital frequency synthesizer. IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE. Institute of Electrical and Electronics Engineers Inc., 2014. pp. 309-312
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