Hardware prototyping of boolean function classification schemes for lossless data compression

Md. Mamun Ibne Reaz, F. Mohd-Yasin, M. S. Sulaiman, K. T. Tho, K. H. Yeow

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

In this paper, we present the realization of Boolean function classification schemes on Altera FLEX10K FPGA device for lossless data compression. The compression algorithm is performed by incorporating Boolean function classification into Huffman coding. This allows for more efficient compression because the data has been categorized and simplified before the encoding is done. The design is followed by the timing analysis and circuit synthesis for the validation, functionality and performance of the designated circuit which supports the practicality, advantages and effectiveness of the proposed hardware realization for the applications. The average compression ratio is 25% to 37.5% from numerous testing with various text inputs with a maximum clock frequency of 27.9 MHz.

Original languageEnglish
Title of host publicationICCC 2004 - Second IEEE International Conference on Computational Cybernetics, Proceedings
EditorsW. Elmenreich, W. Haidinger, J.A.T. Machado
Pages47-51
Number of pages5
Publication statusPublished - 2004
Externally publishedYes
EventICCC 2004 - Second IEEE International Conference on Computational Cybernetics - Vienna
Duration: 30 Aug 20041 Sep 2004

Other

OtherICCC 2004 - Second IEEE International Conference on Computational Cybernetics
CityVienna
Period30/8/041/9/04

Fingerprint

Boolean functions
Data compression
Hardware
Networks (circuits)
Field programmable gate arrays (FPGA)
Clocks
Testing

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Ibne Reaz, M. M., Mohd-Yasin, F., Sulaiman, M. S., Tho, K. T., & Yeow, K. H. (2004). Hardware prototyping of boolean function classification schemes for lossless data compression. In W. Elmenreich, W. Haidinger, & J. A. T. Machado (Eds.), ICCC 2004 - Second IEEE International Conference on Computational Cybernetics, Proceedings (pp. 47-51)

Hardware prototyping of boolean function classification schemes for lossless data compression. / Ibne Reaz, Md. Mamun; Mohd-Yasin, F.; Sulaiman, M. S.; Tho, K. T.; Yeow, K. H.

ICCC 2004 - Second IEEE International Conference on Computational Cybernetics, Proceedings. ed. / W. Elmenreich; W. Haidinger; J.A.T. Machado. 2004. p. 47-51.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Ibne Reaz, MM, Mohd-Yasin, F, Sulaiman, MS, Tho, KT & Yeow, KH 2004, Hardware prototyping of boolean function classification schemes for lossless data compression. in W Elmenreich, W Haidinger & JAT Machado (eds), ICCC 2004 - Second IEEE International Conference on Computational Cybernetics, Proceedings. pp. 47-51, ICCC 2004 - Second IEEE International Conference on Computational Cybernetics, Vienna, 30/8/04.
Ibne Reaz MM, Mohd-Yasin F, Sulaiman MS, Tho KT, Yeow KH. Hardware prototyping of boolean function classification schemes for lossless data compression. In Elmenreich W, Haidinger W, Machado JAT, editors, ICCC 2004 - Second IEEE International Conference on Computational Cybernetics, Proceedings. 2004. p. 47-51
Ibne Reaz, Md. Mamun ; Mohd-Yasin, F. ; Sulaiman, M. S. ; Tho, K. T. ; Yeow, K. H. / Hardware prototyping of boolean function classification schemes for lossless data compression. ICCC 2004 - Second IEEE International Conference on Computational Cybernetics, Proceedings. editor / W. Elmenreich ; W. Haidinger ; J.A.T. Machado. 2004. pp. 47-51
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