Hardware approach of fuzzy inference based signature verification system

Mohd Marnfuzzaman, Md. Mamun Ibne Reaz, L. F. Rahman, M. S. Amin

Research output: Contribution to journalArticle

Abstract

This study describe the realization of a signature verification and forgery detection system on Ahera FLEX10K FPGA device that allows for efficient hardware implementation. The system follows five steps to perform the signature verification which are data acquisition, preprocessing, comparison process and decision process. Mamdani-type fuzzy inference system is used as the core decision maker for verifying the signature. The timing analysis for the validation, functionality and performance of the model is performed using Aldec Active HDL and the logic synthesis was performed using synplify. The design is modularized and each module is modeled individually using hardware description language VHDL. This is followed by the timing analysis and circuit synthesis for the validation, fllllctionality and performance of the designated circuit which supports the practicality, advantages and effectiveness of the proposed hardware realization for the applications with a maximwn clock frequency of 39.80 MHz.

Original languageEnglish
Pages (from-to)467-472
Number of pages6
JournalResearch Journal of Applied Sciences
Volume6
Issue number7
DOIs
Publication statusPublished - 2011

Fingerprint

Computer hardware description languages
Fuzzy inference
inference
hardware description languages
hardware
signatures
Hardware
Networks (circuits)
Field programmable gate arrays (FPGA)
Clocks
Data acquisition
time measurement
preprocessing
synthesis
clocks
data acquisition
logic
modules
Logic Synthesis

Keywords

  • Forgery detection
  • FPGA
  • Fuzzy inference
  • Malaysia
  • Signature verification
  • VHDL

ASJC Scopus subject areas

  • General
  • Engineering(all)

Cite this

Hardware approach of fuzzy inference based signature verification system. / Marnfuzzaman, Mohd; Ibne Reaz, Md. Mamun; Rahman, L. F.; Amin, M. S.

In: Research Journal of Applied Sciences, Vol. 6, No. 7, 2011, p. 467-472.

Research output: Contribution to journalArticle

Marnfuzzaman, Mohd ; Ibne Reaz, Md. Mamun ; Rahman, L. F. ; Amin, M. S. / Hardware approach of fuzzy inference based signature verification system. In: Research Journal of Applied Sciences. 2011 ; Vol. 6, No. 7. pp. 467-472.
@article{8130e7d0a89542819e33e1f6d82b8147,
title = "Hardware approach of fuzzy inference based signature verification system",
abstract = "This study describe the realization of a signature verification and forgery detection system on Ahera FLEX10K FPGA device that allows for efficient hardware implementation. The system follows five steps to perform the signature verification which are data acquisition, preprocessing, comparison process and decision process. Mamdani-type fuzzy inference system is used as the core decision maker for verifying the signature. The timing analysis for the validation, functionality and performance of the model is performed using Aldec Active HDL and the logic synthesis was performed using synplify. The design is modularized and each module is modeled individually using hardware description language VHDL. This is followed by the timing analysis and circuit synthesis for the validation, fllllctionality and performance of the designated circuit which supports the practicality, advantages and effectiveness of the proposed hardware realization for the applications with a maximwn clock frequency of 39.80 MHz.",
keywords = "Forgery detection, FPGA, Fuzzy inference, Malaysia, Signature verification, VHDL",
author = "Mohd Marnfuzzaman and {Ibne Reaz}, {Md. Mamun} and Rahman, {L. F.} and Amin, {M. S.}",
year = "2011",
doi = "10.3923/rjasci.2011.467.472",
language = "English",
volume = "6",
pages = "467--472",
journal = "Research Journal of Applied Sciences",
issn = "1815-932X",
publisher = "Medwell Publishing",
number = "7",

}

TY - JOUR

T1 - Hardware approach of fuzzy inference based signature verification system

AU - Marnfuzzaman, Mohd

AU - Ibne Reaz, Md. Mamun

AU - Rahman, L. F.

AU - Amin, M. S.

PY - 2011

Y1 - 2011

N2 - This study describe the realization of a signature verification and forgery detection system on Ahera FLEX10K FPGA device that allows for efficient hardware implementation. The system follows five steps to perform the signature verification which are data acquisition, preprocessing, comparison process and decision process. Mamdani-type fuzzy inference system is used as the core decision maker for verifying the signature. The timing analysis for the validation, functionality and performance of the model is performed using Aldec Active HDL and the logic synthesis was performed using synplify. The design is modularized and each module is modeled individually using hardware description language VHDL. This is followed by the timing analysis and circuit synthesis for the validation, fllllctionality and performance of the designated circuit which supports the practicality, advantages and effectiveness of the proposed hardware realization for the applications with a maximwn clock frequency of 39.80 MHz.

AB - This study describe the realization of a signature verification and forgery detection system on Ahera FLEX10K FPGA device that allows for efficient hardware implementation. The system follows five steps to perform the signature verification which are data acquisition, preprocessing, comparison process and decision process. Mamdani-type fuzzy inference system is used as the core decision maker for verifying the signature. The timing analysis for the validation, functionality and performance of the model is performed using Aldec Active HDL and the logic synthesis was performed using synplify. The design is modularized and each module is modeled individually using hardware description language VHDL. This is followed by the timing analysis and circuit synthesis for the validation, fllllctionality and performance of the designated circuit which supports the practicality, advantages and effectiveness of the proposed hardware realization for the applications with a maximwn clock frequency of 39.80 MHz.

KW - Forgery detection

KW - FPGA

KW - Fuzzy inference

KW - Malaysia

KW - Signature verification

KW - VHDL

UR - http://www.scopus.com/inward/record.url?scp=84859384722&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84859384722&partnerID=8YFLogxK

U2 - 10.3923/rjasci.2011.467.472

DO - 10.3923/rjasci.2011.467.472

M3 - Article

VL - 6

SP - 467

EP - 472

JO - Research Journal of Applied Sciences

JF - Research Journal of Applied Sciences

SN - 1815-932X

IS - 7

ER -