FPGA realization of Inverse Discrete Wavelet Transform

M. S. Bhuyan, Md Azrul Hasni Madesa, Masuri Othman, Md. Shabiul Islam

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

Lifting Scheme based 2-D Inverse Discrete Wavelet Transform 2-D (IDWT) core for JPEG 2000 is implemented into FPGA following a new approach of reusing hardware components. The approach leads towards higher area efficiency and speed optimization. Design realized by Le-Gall 5/3 filter, achieved significant acceleration that executes at over 300 MHz with 7.13 Msamples throughput whereas using less than 1% of logic elements in Altera Stratix II FPGA. High quality reconstructed image are extracted from Matlab and VHDL simulations. Implementation details of the individual hardware blocks, synthesis result, and performance analysis are presented.

Original languageEnglish
Pages (from-to)277-282
Number of pages6
JournalIEICE Electronics Express
Volume6
Issue number6
DOIs
Publication statusPublished - 25 Mar 2009
Externally publishedYes

Fingerprint

Discrete wavelet transforms
wavelet analysis
Field programmable gate arrays (FPGA)
hardware
gall
Hardware
hardware description languages
Computer hardware description languages
Image quality
logic
Throughput
filters
optimization
synthesis
simulation

Keywords

  • FPGA
  • JPEG 2000
  • Synthesis
  • VHDL
  • Wavelet

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Cite this

FPGA realization of Inverse Discrete Wavelet Transform. / Bhuyan, M. S.; Madesa, Md Azrul Hasni; Othman, Masuri; Islam, Md. Shabiul.

In: IEICE Electronics Express, Vol. 6, No. 6, 25.03.2009, p. 277-282.

Research output: Contribution to journalArticle

Bhuyan, M. S. ; Madesa, Md Azrul Hasni ; Othman, Masuri ; Islam, Md. Shabiul. / FPGA realization of Inverse Discrete Wavelet Transform. In: IEICE Electronics Express. 2009 ; Vol. 6, No. 6. pp. 277-282.
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