FPGA Implementation of rapid cipheringand high throughput of smart card memory ciphering system

Wira Firdaus Yaakob, Jahariah Sampe, Noorfazila Kamal

Research output: Contribution to journalArticle

Abstract

Background: The advances of attack methods on the smart card now-a-days are getting more serious. It has encouraged researchers to put more effort in enhancing the data memory ciphering system in smart card memory management processing unit. Materialsand Methods: In this study, there are three major units that constructs the system: Advanced Encryption Standard (AES) cipher block, Random Number Generator (RNG) key generation and scrambler/descrambler. This system is developed in the Memory Management Processing Unit (MMPU) of the smart card. By having the AES cipher unit, the plaintext from the Central Processing Unit (CPU) is encrypted or decrypted using a random key that is generated by the RNG key generation unit. The encrypted data also called as ciphertext is scrambled with the data from the scrambler/descrambler unit before being written into the memory during the write mode. Meanwhile during the read mode, the secured data from the data memory is descrambled with the data from the scrambler/descrambler unitinto the ciphertext. For memory types that allow for data reading only, e.g., ROM typically storing executable code, the process will be one way only i.e., descrambling and decryption. User Personal Identification Number (PIN) is utilized in the scrambling and descrambling processes. This prototype system is implemented in the Field Programmable Gate Array (FPGA) Xilinx's Zynq-7000 XC7020-1-CLG484. Results: The system is managed to complete the process within a a single cycle CPU that is about 40 nsec with 12002 Look-Up Table (LUT) slices, 3146 slice registers, a maximum frequency of 70.98 MHz and maximum combinational path delay of 0.471 nsec. The key finding of this study is that the system is capable to achieve throughput of 9085 (Mbits sec-1) and 40 nsec ciphering time that are the best compared to the previous study. Conclusion: The proposed system is able to provide a secured data memory ciphering system for smart card with low resources, fast ciphering time and high throughput in the ARM-based FPGA Xilinx Zynq-7000 prototyping. The smart card is used in many applications including national identification (ID), financial security and health insurance.

Original languageEnglish
Pages (from-to)88-96
Number of pages9
JournalAsian Journal of Scientific Research
Volume10
Issue number2
DOIs
Publication statusPublished - 2017

Fingerprint

Smart cards
Field programmable gate arrays (FPGA)
Throughput
Data storage equipment
Cryptography
Program processors
Health insurance
ROM
Processing
Computer systems

Keywords

  • AES
  • ARM-based FPGA
  • ID
  • LUT
  • RNG
  • Smart card

ASJC Scopus subject areas

  • General

Cite this

FPGA Implementation of rapid cipheringand high throughput of smart card memory ciphering system. / Yaakob, Wira Firdaus; Sampe, Jahariah; Kamal, Noorfazila.

In: Asian Journal of Scientific Research, Vol. 10, No. 2, 2017, p. 88-96.

Research output: Contribution to journalArticle

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