Fast clock tree generation using Exact Zero Skew clock routing algorithm

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

A Zero Skew clock routing methodology has been developed to help design team speed up their clock tree generation process. The methodology works by breaking up the clock net into smaller partitions, then inserting clock buffers to drive each portion and lastly, routing the connection from original clock source to each newly inserted clock buffers with zero skew. A few Perl scripts and a new visual basic based routing tool have been developed to support the methodology implementation. The routing algorithm used in this tool is based on the Exact Zero Skew Routing Algorithm. The methodology has been tested using a real design database and resulting in a significant improvement in the through put time required to complete the clock tree generation. This improvement is attributed to the ability to generate clock tree on much smaller portions of clock nets that supports of speeding up the clock tree generation process in IC design.

Original languageEnglish
Pages (from-to)2150-2155
Number of pages6
JournalJournal of Applied Sciences
Volume9
Issue number11
DOIs
Publication statusPublished - 2009

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Routing algorithms
Clocks

Keywords

  • Clock routing
  • Clock tree generation
  • IC design
  • Zero skew

ASJC Scopus subject areas

  • General

Cite this

Fast clock tree generation using Exact Zero Skew clock routing algorithm. / Ibne Reaz, Md. Mamun; Ibrahimy, M. I.; Amin, Nowshad.

In: Journal of Applied Sciences, Vol. 9, No. 11, 2009, p. 2150-2155.

Research output: Contribution to journalArticle

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