Fabrication and simulation of single crystal p-type Si nanowire using SOI technology

Arash Dehzangi, Farhad Larki, Mahmud G. Naseri, Manizheh Navasery, Burhanuddin Y. Majlis, Mohd F. Razip Wee, M. K. Halimah, Md Shabiul Islam, Sawal H. Md Ali, Elias Saion

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

Si nanowires (SiNWs) as building blocks for nanostructured materials and nanoelectronics have attracted much attention due to their major role in device fabrication. In the present work a top-down fabrication approach as atomic force microscope (AFM) nanolithography was performed on Si on insulator (SOI) substrate to fabricate a single crystal p-type SiNW. To draw oxide patterns on top of the SOI substrate local anodic oxidation was carried out by AFM in contact mode. After the oxidation procedure, an optimized solution of 30 wt.% KOH with 10 vol.% IPA for wet etching at 63 °C was applied to extract the nanostructure. The fabricated SiNW had 70-85 nm full width at half maximum width, 90 nm thickness and 4 μm length. The SiNW was simulated using Sentaurus 3D software with the exact same size of the fabricated device. I-V characterization of the SiNW was measured and compared with simulation results. Using simulation results variation of carrier's concentrations, valence band edge energy and recombination generation rate for different applied voltage were investigated.

Original languageEnglish
Pages (from-to)87-93
Number of pages7
JournalApplied Surface Science
Volume334
DOIs
Publication statusPublished - 15 Apr 2015

Fingerprint

Nanowires
Single crystals
Fabrication
Microscopes
Nanolithography
Nanoelectronics
Wet etching
Anodic oxidation
Substrates
Valence bands
Full width at half maximum
Nanostructured materials
Oxides
Carrier concentration
Nanostructures
Oxidation
Electric potential

Keywords

  • Atomic force microscope nanolithography
  • KOH wet etching
  • Silicon on insulator
  • Single crystal silicon nanowire

ASJC Scopus subject areas

  • Surfaces, Coatings and Films

Cite this

Fabrication and simulation of single crystal p-type Si nanowire using SOI technology. / Dehzangi, Arash; Larki, Farhad; Naseri, Mahmud G.; Navasery, Manizheh; Majlis, Burhanuddin Y.; Razip Wee, Mohd F.; Halimah, M. K.; Islam, Md Shabiul; Md Ali, Sawal H.; Saion, Elias.

In: Applied Surface Science, Vol. 334, 15.04.2015, p. 87-93.

Research output: Contribution to journalArticle

Dehzangi, Arash ; Larki, Farhad ; Naseri, Mahmud G. ; Navasery, Manizheh ; Majlis, Burhanuddin Y. ; Razip Wee, Mohd F. ; Halimah, M. K. ; Islam, Md Shabiul ; Md Ali, Sawal H. ; Saion, Elias. / Fabrication and simulation of single crystal p-type Si nanowire using SOI technology. In: Applied Surface Science. 2015 ; Vol. 334. pp. 87-93.
@article{c19aa676c77a4d929fd9e5fcb231d8a7,
title = "Fabrication and simulation of single crystal p-type Si nanowire using SOI technology",
abstract = "Si nanowires (SiNWs) as building blocks for nanostructured materials and nanoelectronics have attracted much attention due to their major role in device fabrication. In the present work a top-down fabrication approach as atomic force microscope (AFM) nanolithography was performed on Si on insulator (SOI) substrate to fabricate a single crystal p-type SiNW. To draw oxide patterns on top of the SOI substrate local anodic oxidation was carried out by AFM in contact mode. After the oxidation procedure, an optimized solution of 30 wt.{\%} KOH with 10 vol.{\%} IPA for wet etching at 63 °C was applied to extract the nanostructure. The fabricated SiNW had 70-85 nm full width at half maximum width, 90 nm thickness and 4 μm length. The SiNW was simulated using Sentaurus 3D software with the exact same size of the fabricated device. I-V characterization of the SiNW was measured and compared with simulation results. Using simulation results variation of carrier's concentrations, valence band edge energy and recombination generation rate for different applied voltage were investigated.",
keywords = "Atomic force microscope nanolithography, KOH wet etching, Silicon on insulator, Single crystal silicon nanowire",
author = "Arash Dehzangi and Farhad Larki and Naseri, {Mahmud G.} and Manizheh Navasery and Majlis, {Burhanuddin Y.} and {Razip Wee}, {Mohd F.} and Halimah, {M. K.} and Islam, {Md Shabiul} and {Md Ali}, {Sawal H.} and Elias Saion",
year = "2015",
month = "4",
day = "15",
doi = "10.1016/j.apsusc.2014.08.074",
language = "English",
volume = "334",
pages = "87--93",
journal = "Applied Surface Science",
issn = "0169-4332",
publisher = "Elsevier",

}

TY - JOUR

T1 - Fabrication and simulation of single crystal p-type Si nanowire using SOI technology

AU - Dehzangi, Arash

AU - Larki, Farhad

AU - Naseri, Mahmud G.

AU - Navasery, Manizheh

AU - Majlis, Burhanuddin Y.

AU - Razip Wee, Mohd F.

AU - Halimah, M. K.

AU - Islam, Md Shabiul

AU - Md Ali, Sawal H.

AU - Saion, Elias

PY - 2015/4/15

Y1 - 2015/4/15

N2 - Si nanowires (SiNWs) as building blocks for nanostructured materials and nanoelectronics have attracted much attention due to their major role in device fabrication. In the present work a top-down fabrication approach as atomic force microscope (AFM) nanolithography was performed on Si on insulator (SOI) substrate to fabricate a single crystal p-type SiNW. To draw oxide patterns on top of the SOI substrate local anodic oxidation was carried out by AFM in contact mode. After the oxidation procedure, an optimized solution of 30 wt.% KOH with 10 vol.% IPA for wet etching at 63 °C was applied to extract the nanostructure. The fabricated SiNW had 70-85 nm full width at half maximum width, 90 nm thickness and 4 μm length. The SiNW was simulated using Sentaurus 3D software with the exact same size of the fabricated device. I-V characterization of the SiNW was measured and compared with simulation results. Using simulation results variation of carrier's concentrations, valence band edge energy and recombination generation rate for different applied voltage were investigated.

AB - Si nanowires (SiNWs) as building blocks for nanostructured materials and nanoelectronics have attracted much attention due to their major role in device fabrication. In the present work a top-down fabrication approach as atomic force microscope (AFM) nanolithography was performed on Si on insulator (SOI) substrate to fabricate a single crystal p-type SiNW. To draw oxide patterns on top of the SOI substrate local anodic oxidation was carried out by AFM in contact mode. After the oxidation procedure, an optimized solution of 30 wt.% KOH with 10 vol.% IPA for wet etching at 63 °C was applied to extract the nanostructure. The fabricated SiNW had 70-85 nm full width at half maximum width, 90 nm thickness and 4 μm length. The SiNW was simulated using Sentaurus 3D software with the exact same size of the fabricated device. I-V characterization of the SiNW was measured and compared with simulation results. Using simulation results variation of carrier's concentrations, valence band edge energy and recombination generation rate for different applied voltage were investigated.

KW - Atomic force microscope nanolithography

KW - KOH wet etching

KW - Silicon on insulator

KW - Single crystal silicon nanowire

UR - http://www.scopus.com/inward/record.url?scp=85027925850&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85027925850&partnerID=8YFLogxK

U2 - 10.1016/j.apsusc.2014.08.074

DO - 10.1016/j.apsusc.2014.08.074

M3 - Article

AN - SCOPUS:85027925850

VL - 334

SP - 87

EP - 93

JO - Applied Surface Science

JF - Applied Surface Science

SN - 0169-4332

ER -