Design of phase frequency detector (PFD), charge pump (CP) and programmable frequency divider for PLL in 0.18um CMOS technology

Anim Arifah Ahmad, Sawal Hamid Md Ali, Noorfazila Kamal, Siti Raudzah Abdul Rahman, Masuri Othman

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, a Phase Frequency Detector (PFD) Charge Pump (CP) and programmable frequency divider Phase Locked Loop (PLL) for Bluetooth Low Energy (BLE) are presented. It is implemented using 180nm CMOS technology. The programmable frequency divider consists of Dual Modulus Prescaler divide by 15/16, 7-Bit Programmable Counter (P), and 6-Bit Swallow Counter (S). The divider will operate between 2.4-2.48 GHz frequency with 40 channels frequency hopping. The design has been simulated with 1.8 Vdd and consumed 3.51mW power.

Original languageEnglish
Title of host publication2018 IEEE International Conference on Semiconductor Electronics, ICSE 2018 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages242-245
Number of pages4
Volume2018-August
ISBN (Electronic)9781538652831
DOIs
Publication statusPublished - 3 Oct 2018
Event13th IEEE International Conference on Semiconductor Electronics, ICSE 2018 - Kuala Lumpur, Malaysia
Duration: 15 Aug 201817 Aug 2018

Other

Other13th IEEE International Conference on Semiconductor Electronics, ICSE 2018
CountryMalaysia
CityKuala Lumpur
Period15/8/1817/8/18

Fingerprint

Phase locked loops
Pumps
Detectors
Frequency hopping
Bluetooth

Keywords

  • charge pump
  • dual modulus prescaler
  • main counter;swallow counter
  • phase frequency detector
  • PLL
  • programmable frequency divider

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Ahmad, A. A., Md Ali, S. H., Kamal, N., Abdul Rahman, S. R., & Othman, M. (2018). Design of phase frequency detector (PFD), charge pump (CP) and programmable frequency divider for PLL in 0.18um CMOS technology. In 2018 IEEE International Conference on Semiconductor Electronics, ICSE 2018 - Proceedings (Vol. 2018-August, pp. 242-245). [8481309] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SMELEC.2018.8481309

Design of phase frequency detector (PFD), charge pump (CP) and programmable frequency divider for PLL in 0.18um CMOS technology. / Ahmad, Anim Arifah; Md Ali, Sawal Hamid; Kamal, Noorfazila; Abdul Rahman, Siti Raudzah; Othman, Masuri.

2018 IEEE International Conference on Semiconductor Electronics, ICSE 2018 - Proceedings. Vol. 2018-August Institute of Electrical and Electronics Engineers Inc., 2018. p. 242-245 8481309.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Ahmad, AA, Md Ali, SH, Kamal, N, Abdul Rahman, SR & Othman, M 2018, Design of phase frequency detector (PFD), charge pump (CP) and programmable frequency divider for PLL in 0.18um CMOS technology. in 2018 IEEE International Conference on Semiconductor Electronics, ICSE 2018 - Proceedings. vol. 2018-August, 8481309, Institute of Electrical and Electronics Engineers Inc., pp. 242-245, 13th IEEE International Conference on Semiconductor Electronics, ICSE 2018, Kuala Lumpur, Malaysia, 15/8/18. https://doi.org/10.1109/SMELEC.2018.8481309
Ahmad AA, Md Ali SH, Kamal N, Abdul Rahman SR, Othman M. Design of phase frequency detector (PFD), charge pump (CP) and programmable frequency divider for PLL in 0.18um CMOS technology. In 2018 IEEE International Conference on Semiconductor Electronics, ICSE 2018 - Proceedings. Vol. 2018-August. Institute of Electrical and Electronics Engineers Inc. 2018. p. 242-245. 8481309 https://doi.org/10.1109/SMELEC.2018.8481309
Ahmad, Anim Arifah ; Md Ali, Sawal Hamid ; Kamal, Noorfazila ; Abdul Rahman, Siti Raudzah ; Othman, Masuri. / Design of phase frequency detector (PFD), charge pump (CP) and programmable frequency divider for PLL in 0.18um CMOS technology. 2018 IEEE International Conference on Semiconductor Electronics, ICSE 2018 - Proceedings. Vol. 2018-August Institute of Electrical and Electronics Engineers Inc., 2018. pp. 242-245
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abstract = "In this paper, a Phase Frequency Detector (PFD) Charge Pump (CP) and programmable frequency divider Phase Locked Loop (PLL) for Bluetooth Low Energy (BLE) are presented. It is implemented using 180nm CMOS technology. The programmable frequency divider consists of Dual Modulus Prescaler divide by 15/16, 7-Bit Programmable Counter (P), and 6-Bit Swallow Counter (S). The divider will operate between 2.4-2.48 GHz frequency with 40 channels frequency hopping. The design has been simulated with 1.8 Vdd and consumed 3.51mW power.",
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