Design of a TESTCHIP for low cost IC testing

Liakot Ali, Roslina Sidek, Ishak Aris, Mohd Alauddin, Mohd Ali

    Research output: Contribution to journalArticle

    1 Citation (Scopus)

    Abstract

    With the continuous increase of the integration densities and complexities, the problem of testing integrated circuits has become much more acute and needs an economic solution with reliable performance. This paper presents the design of a TESTCHIP implementing a multiple polynomial, multiple seed based mixed-mode test technique. Fault simulation experiments on benchmark circuits show that the TESTCHIP is capable of detecting 100% of the faults using a much lower number of test vectors than in the approaches attempted by the other researchers. It also offers lower data storage requirements than that of conventional ATE. The TESTCHIP is capable of testing combinational circuits as well as sequential circuits with scan-path facilities.

    Original languageEnglish
    Pages (from-to)63-72
    Number of pages10
    JournalIntelligent Automation and Soft Computing
    Volume15
    Issue number1
    Publication statusPublished - 2009

    Fingerprint

    Integrated circuit testing
    Sequential circuits
    Combinatorial circuits
    Seed
    Polynomials
    Data storage equipment
    Testing
    Economics
    Networks (circuits)
    Fault Simulation
    Costs
    Mixed Mode
    Experiments
    Data Storage
    Integrated Circuits
    Acute
    Simulation Experiment
    Fault
    Benchmark
    Path

    Keywords

    • BIST
    • MPMSLFSR
    • PRV
    • RESEEDING
    • TE

    ASJC Scopus subject areas

    • Artificial Intelligence
    • Software
    • Theoretical Computer Science
    • Computational Theory and Mathematics

    Cite this

    Ali, L., Sidek, R., Aris, I., Alauddin, M., & Ali, M. (2009). Design of a TESTCHIP for low cost IC testing. Intelligent Automation and Soft Computing, 15(1), 63-72.

    Design of a TESTCHIP for low cost IC testing. / Ali, Liakot; Sidek, Roslina; Aris, Ishak; Alauddin, Mohd; Ali, Mohd.

    In: Intelligent Automation and Soft Computing, Vol. 15, No. 1, 2009, p. 63-72.

    Research output: Contribution to journalArticle

    Ali, L, Sidek, R, Aris, I, Alauddin, M & Ali, M 2009, 'Design of a TESTCHIP for low cost IC testing', Intelligent Automation and Soft Computing, vol. 15, no. 1, pp. 63-72.
    Ali L, Sidek R, Aris I, Alauddin M, Ali M. Design of a TESTCHIP for low cost IC testing. Intelligent Automation and Soft Computing. 2009;15(1):63-72.
    Ali, Liakot ; Sidek, Roslina ; Aris, Ishak ; Alauddin, Mohd ; Ali, Mohd. / Design of a TESTCHIP for low cost IC testing. In: Intelligent Automation and Soft Computing. 2009 ; Vol. 15, No. 1. pp. 63-72.
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