Design of a SOC for low cost IC testing

Liakot Ali, Roslina Sidek, Ishak Aris, Rahman Wagiran, Mohd Alauddin Mohd

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    This paper presents the design of a SoC for low cost IC testing using verilog HDL. Conventional IC tester, ATE, is based on deterministic algorithm. With the continuous increase of integration densities and complexities in IC technology, ATE reveals serious drawbacks and point towards having a new approach in IC testing for its economic and reliable solution. Recently researchers have shown that dynamic reseeding based mixed-mode (DRM) approach outperforms all other existing test technologies. The SoC is designed implementing the DRM technique. It is capable of testing combinational circuits as well as sequential circuits with scan-path facilities efficiently. It can also be used for testing PCB interconnection faults.

    Original languageEnglish
    Title of host publicationProceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics
    Pages374-378
    Number of pages5
    Publication statusPublished - 2004
    Event2004 IEEE International Conference on Semiconductor Electronics, ICSE 2004 - Kuala Lumpur
    Duration: 4 Dec 20049 Dec 2004

    Other

    Other2004 IEEE International Conference on Semiconductor Electronics, ICSE 2004
    CityKuala Lumpur
    Period4/12/049/12/04

    Fingerprint

    Testing
    Costs
    Sequential circuits
    Computer hardware description languages
    Combinatorial circuits
    Polychlorinated biphenyls
    Economics
    System-on-chip

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

    Cite this

    Ali, L., Sidek, R., Aris, I., Wagiran, R., & Mohd, M. A. (2004). Design of a SOC for low cost IC testing. In Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics (pp. 374-378). [1620908]

    Design of a SOC for low cost IC testing. / Ali, Liakot; Sidek, Roslina; Aris, Ishak; Wagiran, Rahman; Mohd, Mohd Alauddin.

    Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics. 2004. p. 374-378 1620908.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Ali, L, Sidek, R, Aris, I, Wagiran, R & Mohd, MA 2004, Design of a SOC for low cost IC testing. in Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics., 1620908, pp. 374-378, 2004 IEEE International Conference on Semiconductor Electronics, ICSE 2004, Kuala Lumpur, 4/12/04.
    Ali L, Sidek R, Aris I, Wagiran R, Mohd MA. Design of a SOC for low cost IC testing. In Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics. 2004. p. 374-378. 1620908
    Ali, Liakot ; Sidek, Roslina ; Aris, Ishak ; Wagiran, Rahman ; Mohd, Mohd Alauddin. / Design of a SOC for low cost IC testing. Proceedings ICSE 2004 - 2004 IEEE International Conference on Semiconductor Electronics. 2004. pp. 374-378
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