Behavioural performance and variation modelling for hierarchical-based analogue IC design

Sawal Hamid Md Ali, Reuben Wilcock, Peter Wilson

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

A new approach in hierarchical optimisation is presented which is capable of optimising both the performance and yield of an analogue design. Performance and yield trade offs are analysed using a combination of multi-objective evolutionary algorithms and Monte Carlo simulations. A behavioural model that combines the performance and variation for a given circuit topology is developed which can be used to optimise the system level structure. The approach enables top-down system optimisation, not only for performance but also for yield. The model has been developed in Verilog-A and tested extensively with practical designs using the Spectre simulator. A benchmark OTA circuit is used to demonstrate the behavioural model development and a 7th order video filter has been designed to demonstrate hierarchical optimisation at the system level. The results have been verified with transistor level simulations and suggest that an accurate performance and yield prediction can be achieved with the proposed algorithm.

Original languageEnglish
Title of host publicationBMAS 2008 - Proceedings of the 2008 IEEE International Behavioral Modeling and Simulation Workshop
Pages124-129
Number of pages6
DOIs
Publication statusPublished - 2008
Externally publishedYes
Event2008 IEEE International Behavioral Modeling and Simulation Workshop, BMAS 2008 - San Jose, CA
Duration: 25 Sep 200826 Sep 2008

Other

Other2008 IEEE International Behavioral Modeling and Simulation Workshop, BMAS 2008
CitySan Jose, CA
Period25/9/0826/9/08

Fingerprint

Computer hardware description languages
Electric network topology
Evolutionary algorithms
Transistors
Simulators
Networks (circuits)
Integrated circuit design
Analog integrated circuits
Monte Carlo simulation

ASJC Scopus subject areas

  • Artificial Intelligence
  • Computational Theory and Mathematics
  • Electrical and Electronic Engineering

Cite this

Md Ali, S. H., Wilcock, R., & Wilson, P. (2008). Behavioural performance and variation modelling for hierarchical-based analogue IC design. In BMAS 2008 - Proceedings of the 2008 IEEE International Behavioral Modeling and Simulation Workshop (pp. 124-129). [4751253] https://doi.org/10.1109/BMAS.2008.4751253

Behavioural performance and variation modelling for hierarchical-based analogue IC design. / Md Ali, Sawal Hamid; Wilcock, Reuben; Wilson, Peter.

BMAS 2008 - Proceedings of the 2008 IEEE International Behavioral Modeling and Simulation Workshop. 2008. p. 124-129 4751253.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Md Ali, SH, Wilcock, R & Wilson, P 2008, Behavioural performance and variation modelling for hierarchical-based analogue IC design. in BMAS 2008 - Proceedings of the 2008 IEEE International Behavioral Modeling and Simulation Workshop., 4751253, pp. 124-129, 2008 IEEE International Behavioral Modeling and Simulation Workshop, BMAS 2008, San Jose, CA, 25/9/08. https://doi.org/10.1109/BMAS.2008.4751253
Md Ali SH, Wilcock R, Wilson P. Behavioural performance and variation modelling for hierarchical-based analogue IC design. In BMAS 2008 - Proceedings of the 2008 IEEE International Behavioral Modeling and Simulation Workshop. 2008. p. 124-129. 4751253 https://doi.org/10.1109/BMAS.2008.4751253
Md Ali, Sawal Hamid ; Wilcock, Reuben ; Wilson, Peter. / Behavioural performance and variation modelling for hierarchical-based analogue IC design. BMAS 2008 - Proceedings of the 2008 IEEE International Behavioral Modeling and Simulation Workshop. 2008. pp. 124-129
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