An overview of power dissipation and control techniques in cmos technology

N. B. Romli, K. N. Minhad, Md. Mamun Ibne Reaz, Md S. Amin

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

Total power dissipation in CMOS circuits has become a huge challenging in current semiconductor industry due to the leakage current and the leakage power. The exponential growth of both static and dynamic power dissipations in any CMOS process technology option has increased the cost and efficiency of the system. Technology options are used for the execution specifications and usually it depends on the optimisation and the performance constraints over the chip. This article reviews the relevant researches of the source or power dissipation, the mechanism to reduce the dynamic power dissipation as well as static power dissipation and an overview of various circuit techniques to control them. Important device parameters including voltage threshold and switching capacitance impact to the circuit performance in lowering both dynamic and static power dissipation are presented. The demand for the reduction of power dissipation in CMOS technology shall remain a challenging and active area of research for years to come. Thus, this review shall work as a guideline for the researchers who wish to work on power dissipation and control techniques.

Original languageEnglish
Pages (from-to)364-382
Number of pages19
JournalJournal of Engineering Science and Technology
Volume10
Issue number3
Publication statusPublished - 1 Mar 2015

Fingerprint

Power control
Energy dissipation
Networks (circuits)
Threshold voltage
Leakage currents
Capacitance
Semiconductor materials
Specifications
Costs
Industry

Keywords

  • CMOS
  • Dynamic power
  • Logic speed
  • Low power
  • Static power

ASJC Scopus subject areas

  • Engineering(all)

Cite this

An overview of power dissipation and control techniques in cmos technology. / Romli, N. B.; Minhad, K. N.; Ibne Reaz, Md. Mamun; Amin, Md S.

In: Journal of Engineering Science and Technology, Vol. 10, No. 3, 01.03.2015, p. 364-382.

Research output: Contribution to journalArticle

@article{0ea9d7633b9b4eea8dd5f2200b3928b4,
title = "An overview of power dissipation and control techniques in cmos technology",
abstract = "Total power dissipation in CMOS circuits has become a huge challenging in current semiconductor industry due to the leakage current and the leakage power. The exponential growth of both static and dynamic power dissipations in any CMOS process technology option has increased the cost and efficiency of the system. Technology options are used for the execution specifications and usually it depends on the optimisation and the performance constraints over the chip. This article reviews the relevant researches of the source or power dissipation, the mechanism to reduce the dynamic power dissipation as well as static power dissipation and an overview of various circuit techniques to control them. Important device parameters including voltage threshold and switching capacitance impact to the circuit performance in lowering both dynamic and static power dissipation are presented. The demand for the reduction of power dissipation in CMOS technology shall remain a challenging and active area of research for years to come. Thus, this review shall work as a guideline for the researchers who wish to work on power dissipation and control techniques.",
keywords = "CMOS, Dynamic power, Logic speed, Low power, Static power",
author = "Romli, {N. B.} and Minhad, {K. N.} and {Ibne Reaz}, {Md. Mamun} and Amin, {Md S.}",
year = "2015",
month = "3",
day = "1",
language = "English",
volume = "10",
pages = "364--382",
journal = "Journal of Engineering Science and Technology",
issn = "1823-4690",
publisher = "Taylor's University College",
number = "3",

}

TY - JOUR

T1 - An overview of power dissipation and control techniques in cmos technology

AU - Romli, N. B.

AU - Minhad, K. N.

AU - Ibne Reaz, Md. Mamun

AU - Amin, Md S.

PY - 2015/3/1

Y1 - 2015/3/1

N2 - Total power dissipation in CMOS circuits has become a huge challenging in current semiconductor industry due to the leakage current and the leakage power. The exponential growth of both static and dynamic power dissipations in any CMOS process technology option has increased the cost and efficiency of the system. Technology options are used for the execution specifications and usually it depends on the optimisation and the performance constraints over the chip. This article reviews the relevant researches of the source or power dissipation, the mechanism to reduce the dynamic power dissipation as well as static power dissipation and an overview of various circuit techniques to control them. Important device parameters including voltage threshold and switching capacitance impact to the circuit performance in lowering both dynamic and static power dissipation are presented. The demand for the reduction of power dissipation in CMOS technology shall remain a challenging and active area of research for years to come. Thus, this review shall work as a guideline for the researchers who wish to work on power dissipation and control techniques.

AB - Total power dissipation in CMOS circuits has become a huge challenging in current semiconductor industry due to the leakage current and the leakage power. The exponential growth of both static and dynamic power dissipations in any CMOS process technology option has increased the cost and efficiency of the system. Technology options are used for the execution specifications and usually it depends on the optimisation and the performance constraints over the chip. This article reviews the relevant researches of the source or power dissipation, the mechanism to reduce the dynamic power dissipation as well as static power dissipation and an overview of various circuit techniques to control them. Important device parameters including voltage threshold and switching capacitance impact to the circuit performance in lowering both dynamic and static power dissipation are presented. The demand for the reduction of power dissipation in CMOS technology shall remain a challenging and active area of research for years to come. Thus, this review shall work as a guideline for the researchers who wish to work on power dissipation and control techniques.

KW - CMOS

KW - Dynamic power

KW - Logic speed

KW - Low power

KW - Static power

UR - http://www.scopus.com/inward/record.url?scp=84923537871&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84923537871&partnerID=8YFLogxK

M3 - Article

VL - 10

SP - 364

EP - 382

JO - Journal of Engineering Science and Technology

JF - Journal of Engineering Science and Technology

SN - 1823-4690

IS - 3

ER -