An enhanced smart card memory ciphering system implementation on FPGA

Wira Firdaus Yaakob, Jahariah Sampe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper describes about the design and implementation of an enhanced memory ciphering system of a smart card prototype in Cyclone V System-on-a-Chip (SoC) 5CSEMA5F31C6N Field Programmable Gate Array (FPGA) device. The comparison between the design implementation in this device and in Xilinx's Zynq-7000 XC7020-1-CLG484 FPGA device is explained in this paper in terms of resource utilization and time requirements. The memory ciphering system in the smart card is capable to complete in 40ns that is a single cycle CPU of the smart card. The implementation in the Cyclone V SoC has the least utilized logics and the highest maximum frequency (Fmax) that are 8, 313 slices and 195 MHz respectively. The smart card memory ciphering system provides significant enhancement in terms of security and performance especially for smart card secured applications like national identification (ID), financial transactions and health insurance.

Original languageEnglish
Title of host publication2017 7th International Workshop on Computer Science and Engineering, WCSE 2017
PublisherInternational Workshop on Computer Science and Engineering (WCSE)
Pages977-982
Number of pages6
ISBN (Electronic)9789811136719
Publication statusPublished - 2017
Event2017 7th International Workshop on Computer Science and Engineering, WCSE 2017 - Beijing, China
Duration: 25 Jun 201727 Jun 2017

Other

Other2017 7th International Workshop on Computer Science and Engineering, WCSE 2017
CountryChina
CityBeijing
Period25/6/1727/6/17

Fingerprint

Smart cards
Field programmable gate arrays (FPGA)
Data storage equipment
Health insurance
Program processors
System implementation
Smart card

Keywords

  • 5CSEMA5F31C6N
  • AES
  • ARM cortex A9
  • Smart card
  • XC4VLX60
  • XC7Z020

ASJC Scopus subject areas

  • Information Systems and Management
  • Computer Science Applications
  • Signal Processing
  • Computer Networks and Communications
  • Software

Cite this

Yaakob, W. F., & Sampe, J. (2017). An enhanced smart card memory ciphering system implementation on FPGA. In 2017 7th International Workshop on Computer Science and Engineering, WCSE 2017 (pp. 977-982). International Workshop on Computer Science and Engineering (WCSE).

An enhanced smart card memory ciphering system implementation on FPGA. / Yaakob, Wira Firdaus; Sampe, Jahariah.

2017 7th International Workshop on Computer Science and Engineering, WCSE 2017. International Workshop on Computer Science and Engineering (WCSE), 2017. p. 977-982.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Yaakob, WF & Sampe, J 2017, An enhanced smart card memory ciphering system implementation on FPGA. in 2017 7th International Workshop on Computer Science and Engineering, WCSE 2017. International Workshop on Computer Science and Engineering (WCSE), pp. 977-982, 2017 7th International Workshop on Computer Science and Engineering, WCSE 2017, Beijing, China, 25/6/17.
Yaakob WF, Sampe J. An enhanced smart card memory ciphering system implementation on FPGA. In 2017 7th International Workshop on Computer Science and Engineering, WCSE 2017. International Workshop on Computer Science and Engineering (WCSE). 2017. p. 977-982
Yaakob, Wira Firdaus ; Sampe, Jahariah. / An enhanced smart card memory ciphering system implementation on FPGA. 2017 7th International Workshop on Computer Science and Engineering, WCSE 2017. International Workshop on Computer Science and Engineering (WCSE), 2017. pp. 977-982
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