An efficient ROM compression technique for linear- interpolated direct digital frequency synthesizer

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A direct digital frequency synthesizer (DDFS) based on piecewise linear approximation method is presented in this paper. The proposed method allows sequential read access to memory cells per one clock cycle using time sharing. The output values will be momentarily stowed and read at a later time; thereby the slope is simply derived from these sinusoid points at successive phase angles. As a consequence, the DDFS only needs to store fewer coefficients and the hardware complexity is significantly shortened. The proposed DDFS has been analyzed using MATLAB Simulink and examined over entire Nyquist frequency band. The simulation results show a promising result of 84 dBc spurious free dynamic range (SFDR). The resultant low complexity architecture along with high spectral purity synthesized signal meets the specifications of recent portable battery-driven products.

Original languageEnglish
Title of host publicationIEEE International Conference on Semiconductor Electronics, Proceedings, ICSE
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages182-185
Number of pages4
ISBN (Print)9781479957606
DOIs
Publication statusPublished - 10 Oct 2014
Event11th IEEE International Conference on Semiconductor Electronics, ICSE 2014 - Kuala Lumpur
Duration: 27 Aug 201429 Aug 2014

Other

Other11th IEEE International Conference on Semiconductor Electronics, ICSE 2014
CityKuala Lumpur
Period27/8/1429/8/14

Fingerprint

Frequency synthesizers
ROM
MATLAB
Frequency bands
Clocks
Specifications
Hardware
Data storage equipment

Keywords

  • DDFS
  • DDS
  • Linear interpolation

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Omran, Q. K., Islam, M. T., Misran, N., & Faruque, M. R. I. (2014). An efficient ROM compression technique for linear- interpolated direct digital frequency synthesizer. In IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE (pp. 182-185). [6920826] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SMELEC.2014.6920826

An efficient ROM compression technique for linear- interpolated direct digital frequency synthesizer. / Omran, Qahtan Khalaf; Islam, Mohammad Tariqul; Misran, Norbahiah; Faruque, Mohammad Rashed Iqbal.

IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE. Institute of Electrical and Electronics Engineers Inc., 2014. p. 182-185 6920826.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Omran, QK, Islam, MT, Misran, N & Faruque, MRI 2014, An efficient ROM compression technique for linear- interpolated direct digital frequency synthesizer. in IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE., 6920826, Institute of Electrical and Electronics Engineers Inc., pp. 182-185, 11th IEEE International Conference on Semiconductor Electronics, ICSE 2014, Kuala Lumpur, 27/8/14. https://doi.org/10.1109/SMELEC.2014.6920826
Omran QK, Islam MT, Misran N, Faruque MRI. An efficient ROM compression technique for linear- interpolated direct digital frequency synthesizer. In IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE. Institute of Electrical and Electronics Engineers Inc. 2014. p. 182-185. 6920826 https://doi.org/10.1109/SMELEC.2014.6920826
Omran, Qahtan Khalaf ; Islam, Mohammad Tariqul ; Misran, Norbahiah ; Faruque, Mohammad Rashed Iqbal. / An efficient ROM compression technique for linear- interpolated direct digital frequency synthesizer. IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE. Institute of Electrical and Electronics Engineers Inc., 2014. pp. 182-185
@inproceedings{54bd4db7ac15418d89b80fdfc51dde8c,
title = "An efficient ROM compression technique for linear- interpolated direct digital frequency synthesizer",
abstract = "A direct digital frequency synthesizer (DDFS) based on piecewise linear approximation method is presented in this paper. The proposed method allows sequential read access to memory cells per one clock cycle using time sharing. The output values will be momentarily stowed and read at a later time; thereby the slope is simply derived from these sinusoid points at successive phase angles. As a consequence, the DDFS only needs to store fewer coefficients and the hardware complexity is significantly shortened. The proposed DDFS has been analyzed using MATLAB Simulink and examined over entire Nyquist frequency band. The simulation results show a promising result of 84 dBc spurious free dynamic range (SFDR). The resultant low complexity architecture along with high spectral purity synthesized signal meets the specifications of recent portable battery-driven products.",
keywords = "DDFS, DDS, Linear interpolation",
author = "Omran, {Qahtan Khalaf} and Islam, {Mohammad Tariqul} and Norbahiah Misran and Faruque, {Mohammad Rashed Iqbal}",
year = "2014",
month = "10",
day = "10",
doi = "10.1109/SMELEC.2014.6920826",
language = "English",
isbn = "9781479957606",
pages = "182--185",
booktitle = "IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - An efficient ROM compression technique for linear- interpolated direct digital frequency synthesizer

AU - Omran, Qahtan Khalaf

AU - Islam, Mohammad Tariqul

AU - Misran, Norbahiah

AU - Faruque, Mohammad Rashed Iqbal

PY - 2014/10/10

Y1 - 2014/10/10

N2 - A direct digital frequency synthesizer (DDFS) based on piecewise linear approximation method is presented in this paper. The proposed method allows sequential read access to memory cells per one clock cycle using time sharing. The output values will be momentarily stowed and read at a later time; thereby the slope is simply derived from these sinusoid points at successive phase angles. As a consequence, the DDFS only needs to store fewer coefficients and the hardware complexity is significantly shortened. The proposed DDFS has been analyzed using MATLAB Simulink and examined over entire Nyquist frequency band. The simulation results show a promising result of 84 dBc spurious free dynamic range (SFDR). The resultant low complexity architecture along with high spectral purity synthesized signal meets the specifications of recent portable battery-driven products.

AB - A direct digital frequency synthesizer (DDFS) based on piecewise linear approximation method is presented in this paper. The proposed method allows sequential read access to memory cells per one clock cycle using time sharing. The output values will be momentarily stowed and read at a later time; thereby the slope is simply derived from these sinusoid points at successive phase angles. As a consequence, the DDFS only needs to store fewer coefficients and the hardware complexity is significantly shortened. The proposed DDFS has been analyzed using MATLAB Simulink and examined over entire Nyquist frequency band. The simulation results show a promising result of 84 dBc spurious free dynamic range (SFDR). The resultant low complexity architecture along with high spectral purity synthesized signal meets the specifications of recent portable battery-driven products.

KW - DDFS

KW - DDS

KW - Linear interpolation

UR - http://www.scopus.com/inward/record.url?scp=84908236879&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84908236879&partnerID=8YFLogxK

U2 - 10.1109/SMELEC.2014.6920826

DO - 10.1109/SMELEC.2014.6920826

M3 - Conference contribution

AN - SCOPUS:84908236879

SN - 9781479957606

SP - 182

EP - 185

BT - IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE

PB - Institute of Electrical and Electronics Engineers Inc.

ER -