A study on low power phase frequency detectors for delay locked loop

L. W. Loon, Md. Mamun Ibne Reaz, M. A.S. Bhuiyan, Mohd Marufuzzaman, Md Torikul Islam Badal

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Delay Locked Loops (DLL) adapted in various applications due to its low power characteristics. Aggressive power demand in sensors, medical devices and new communications applications with embedded DLL has affected by Phase Frequency Detector (PFD) design techniques. This paper presents a review of various PFD in DLL design based on their main parameters including dynamic logic PFD topologies, PFD important parameters and issues total power consumption as well as their design trade-offs. This review paper gives a guideline to the future researchers for designing high speed and low power PFD.

Original languageEnglish
Title of host publication2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages147-150
Number of pages4
ISBN (Electronic)9781509028894
DOIs
Publication statusPublished - 27 Mar 2017
Event2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016 - Putrajaya, Malaysia
Duration: 14 Nov 201616 Nov 2016

Other

Other2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016
CountryMalaysia
CityPutrajaya
Period14/11/1616/11/16

Fingerprint

Detectors
detectors
logic
Electric power utilization
topology
communication
high speed
Topology
sensors
Communication
Sensors

Keywords

  • CMOS
  • DLL
  • PFD

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Biomedical Engineering
  • Control and Systems Engineering
  • Hardware and Architecture
  • Computer Networks and Communications
  • Instrumentation

Cite this

Loon, L. W., Ibne Reaz, M. M., Bhuiyan, M. A. S., Marufuzzaman, M., & Badal, M. T. I. (2017). A study on low power phase frequency detectors for delay locked loop. In 2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016 (pp. 147-150). [7888027] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICAEES.2016.7888027

A study on low power phase frequency detectors for delay locked loop. / Loon, L. W.; Ibne Reaz, Md. Mamun; Bhuiyan, M. A.S.; Marufuzzaman, Mohd; Badal, Md Torikul Islam.

2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016. Institute of Electrical and Electronics Engineers Inc., 2017. p. 147-150 7888027.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Loon, LW, Ibne Reaz, MM, Bhuiyan, MAS, Marufuzzaman, M & Badal, MTI 2017, A study on low power phase frequency detectors for delay locked loop. in 2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016., 7888027, Institute of Electrical and Electronics Engineers Inc., pp. 147-150, 2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016, Putrajaya, Malaysia, 14/11/16. https://doi.org/10.1109/ICAEES.2016.7888027
Loon LW, Ibne Reaz MM, Bhuiyan MAS, Marufuzzaman M, Badal MTI. A study on low power phase frequency detectors for delay locked loop. In 2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016. Institute of Electrical and Electronics Engineers Inc. 2017. p. 147-150. 7888027 https://doi.org/10.1109/ICAEES.2016.7888027
Loon, L. W. ; Ibne Reaz, Md. Mamun ; Bhuiyan, M. A.S. ; Marufuzzaman, Mohd ; Badal, Md Torikul Islam. / A study on low power phase frequency detectors for delay locked loop. 2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 147-150
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