A low power Op Amp for 3-bit digital to analog converter in 0.18 μm CMOS process

Noor A B A Taib, Md. Mamun Ibne Reaz, Labonnah F. Rahman, Fazida Hanim Hashim

Research output: Contribution to journalArticle

Abstract

Digital to (DAC) is used to get analog voltage corresponding to input digital data in VLSI circuit design with greater integration levels. However, providing linear current and voltage outputs with the use of strictly CMOS devices presents the need for a low power operational amplifier (op-amp) circuit. In this research, the analysis of op-amp circuit for 3-bit DAC is illustrated. In order to reduce the power dissipation, weighted resistor is utilized in the proposed design. To design the op-amp circuit for 3-bit DAC, the design has been implemented in CEDEC 0.18 μm CMOS process. The simulated result shows that, under 8 V as the supply voltage the total power dissipation for the proposed DAC is 43.6 nW. Moreover, 143.17 μm is found as the total chip area of the designed op-amp circuit for 3-bit DAC.

Original languageEnglish
Pages (from-to)2592-2598
Number of pages7
JournalResearch Journal of Applied Sciences, Engineering and Technology
Volume5
Issue number8
Publication statusPublished - 2013

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Operational amplifiers
Digital to analog conversion
Networks (circuits)
Energy dissipation
Electric potential
VLSI circuits
Power amplifiers
Resistors

Keywords

  • CMOS
  • DAC
  • Op-amp
  • Weighted resistor

ASJC Scopus subject areas

  • Engineering(all)
  • Computer Science(all)

Cite this

A low power Op Amp for 3-bit digital to analog converter in 0.18 μm CMOS process. / Taib, Noor A B A; Ibne Reaz, Md. Mamun; Rahman, Labonnah F.; Hashim, Fazida Hanim.

In: Research Journal of Applied Sciences, Engineering and Technology, Vol. 5, No. 8, 2013, p. 2592-2598.

Research output: Contribution to journalArticle

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