2PCDAL

Two-phase clocking dual-rail adiabatic logic

Yasuhiro Takahashi, Zhongyu Luo, Toshikazu Sekine, Nazrul Anuar Nayan, Michio Yokoyama

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

This paper presents a new dual-rail adiabatic logic which called 2PCDAL. Our proposed circuit is based on 2N2N2P structure. Unlike 2N2N2P which is driven by four-phase clocking, the proposed logic only needs two-phase clocking to operate. Compared with the proposed 2PCDAL and the other dual-rail quasi-adiabatic logic families of cell design, namely, 2N2N2P, CAL, ECRL, PAL, and PFAL, we show that the energy consumption of the proposed 2PCDAL inverter is almost the same as those of the other dual-rail adiabatic logics (i.e. 2N2N2P, ECRL, and PFAL) in the range of from 10 kHz to 10 MHz.

Original languageEnglish
Title of host publicationIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
Pages124-127
Number of pages4
DOIs
Publication statusPublished - 2012
Event2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 - Kaohsiung
Duration: 2 Dec 20125 Dec 2012

Other

Other2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
CityKaohsiung
Period2/12/125/12/12

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Rails
Energy utilization
Networks (circuits)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Takahashi, Y., Luo, Z., Sekine, T., Nayan, N. A., & Yokoyama, M. (2012). 2PCDAL: Two-phase clocking dual-rail adiabatic logic. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS (pp. 124-127). [6418987] https://doi.org/10.1109/APCCAS.2012.6418987

2PCDAL : Two-phase clocking dual-rail adiabatic logic. / Takahashi, Yasuhiro; Luo, Zhongyu; Sekine, Toshikazu; Nayan, Nazrul Anuar; Yokoyama, Michio.

IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2012. p. 124-127 6418987.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Takahashi, Y, Luo, Z, Sekine, T, Nayan, NA & Yokoyama, M 2012, 2PCDAL: Two-phase clocking dual-rail adiabatic logic. in IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS., 6418987, pp. 124-127, 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012, Kaohsiung, 2/12/12. https://doi.org/10.1109/APCCAS.2012.6418987
Takahashi Y, Luo Z, Sekine T, Nayan NA, Yokoyama M. 2PCDAL: Two-phase clocking dual-rail adiabatic logic. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2012. p. 124-127. 6418987 https://doi.org/10.1109/APCCAS.2012.6418987
Takahashi, Yasuhiro ; Luo, Zhongyu ; Sekine, Toshikazu ; Nayan, Nazrul Anuar ; Yokoyama, Michio. / 2PCDAL : Two-phase clocking dual-rail adiabatic logic. IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2012. pp. 124-127
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